From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66C4EC4363D for ; Thu, 8 Oct 2020 02:12:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1E57E207C3 for ; Thu, 8 Oct 2020 02:12:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728108AbgJHCM4 (ORCPT ); Wed, 7 Oct 2020 22:12:56 -0400 Received: from mga02.intel.com ([134.134.136.20]:31771 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727345AbgJHCMy (ORCPT ); Wed, 7 Oct 2020 22:12:54 -0400 IronPort-SDR: U/xZOmv43itVUDtR12sIRQSWPD/0yMVupjbzuxChMh7Kazf6ydJSCRZyQyrAnmOcub5rgdzwLn KT789X5Al8OQ== X-IronPort-AV: E=McAfee;i="6000,8403,9767"; a="152154704" X-IronPort-AV: E=Sophos;i="5.77,349,1596524400"; d="scan'208";a="152154704" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2020 19:12:53 -0700 IronPort-SDR: +8u5tLhidznlV/PYy90DzgZG8sUR2WkaTwogTL+L2tj4DbD4GQ626dhy8RacSMWHBFUNzFzfjH 2MYT8niVjX1Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,349,1596524400"; d="scan'208";a="355211196" Received: from zulkifl3-ilbpg0.png.intel.com ([10.88.229.114]) by orsmga007.jf.intel.com with ESMTP; 07 Oct 2020 19:12:50 -0700 From: muhammad.husaini.zulkifli@intel.com To: adrian.hunter@intel.com, michal.simek@xilinx.com, andriy.shevchenko@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lakshmi.bai.raja.subramanian@intel.com, wan.ahmad.zainie.wan.mohamad@intel.com, muhammad.husaini.zulkifli@intel.com, arnd@arndb.de Subject: [PATCH v4 2/4] dt-bindings: mmc: Add uhs-gpio for Keem Bay UHS-1 Support Date: Thu, 8 Oct 2020 10:09:34 +0800 Message-Id: <20201008020936.19894-3-muhammad.husaini.zulkifli@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201008020936.19894-1-muhammad.husaini.zulkifli@intel.com> References: <20201008020936.19894-1-muhammad.husaini.zulkifli@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Muhammad Husaini Zulkifli Add DT bindings of uhs-gpio for Keem Bay SOC UHS Mode Support Signed-off-by: Muhammad Husaini Zulkifli --- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index 58fe9d02a781..320566a673f0 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -83,7 +83,7 @@ properties: - const: intel,keembay-sdhci-5.1-sd # Intel Keem Bay SD controller description: For this device it is strongly suggested to include - arasan,soc-ctl-syscon. + arasan,soc-ctl-syscon and uhs-gpio. - const: intel,keembay-sdhci-5.1-sdio # Intel Keem Bay SDIO controller description: For this device it is strongly suggested to include @@ -152,6 +152,11 @@ properties: description: The MIO bank number in which the command and data lines are configured. + uhs-gpio: + description: + The power mux input will be configure using the GPIO provided + to generate either 1.8v or 3.3v output. + dependencies: clock-output-names: [ '#clock-cells' ] '#clock-cells': [ clock-output-names ] @@ -300,4 +305,5 @@ examples: clocks = <&scmi_clk KEEM_BAY_PSS_AUX_SD0>, <&scmi_clk KEEM_BAY_PSS_SD0>; arasan,soc-ctl-syscon = <&sd0_phy_syscon>; + uhs-gpio = <&pca0 17 0>; }; -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A4BFC433E7 for ; Thu, 8 Oct 2020 02:14:19 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 89DD02085B for ; Thu, 8 Oct 2020 02:14:18 +0000 (UTC) Authentication-Results: mail.kernel.org; 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d="scan'208";a="355211196" Received: from zulkifl3-ilbpg0.png.intel.com ([10.88.229.114]) by orsmga007.jf.intel.com with ESMTP; 07 Oct 2020 19:12:50 -0700 From: muhammad.husaini.zulkifli@intel.com To: adrian.hunter@intel.com, michal.simek@xilinx.com, andriy.shevchenko@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/4] dt-bindings: mmc: Add uhs-gpio for Keem Bay UHS-1 Support Date: Thu, 8 Oct 2020 10:09:34 +0800 Message-Id: <20201008020936.19894-3-muhammad.husaini.zulkifli@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201008020936.19894-1-muhammad.husaini.zulkifli@intel.com> References: <20201008020936.19894-1-muhammad.husaini.zulkifli@intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201007_221254_298363_A4793095 X-CRM114-Status: GOOD ( 13.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lakshmi.bai.raja.subramanian@intel.com, muhammad.husaini.zulkifli@intel.com, arnd@arndb.de, wan.ahmad.zainie.wan.mohamad@intel.com MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Muhammad Husaini Zulkifli Add DT bindings of uhs-gpio for Keem Bay SOC UHS Mode Support Signed-off-by: Muhammad Husaini Zulkifli --- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index 58fe9d02a781..320566a673f0 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -83,7 +83,7 @@ properties: - const: intel,keembay-sdhci-5.1-sd # Intel Keem Bay SD controller description: For this device it is strongly suggested to include - arasan,soc-ctl-syscon. + arasan,soc-ctl-syscon and uhs-gpio. - const: intel,keembay-sdhci-5.1-sdio # Intel Keem Bay SDIO controller description: For this device it is strongly suggested to include @@ -152,6 +152,11 @@ properties: description: The MIO bank number in which the command and data lines are configured. + uhs-gpio: + description: + The power mux input will be configure using the GPIO provided + to generate either 1.8v or 3.3v output. + dependencies: clock-output-names: [ '#clock-cells' ] '#clock-cells': [ clock-output-names ] @@ -300,4 +305,5 @@ examples: clocks = <&scmi_clk KEEM_BAY_PSS_AUX_SD0>, <&scmi_clk KEEM_BAY_PSS_SD0>; arasan,soc-ctl-syscon = <&sd0_phy_syscon>; + uhs-gpio = <&pca0 17 0>; }; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel