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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id a17sm21215068wra.29.2020.10.11.12.32.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 12:32:38 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 01/10] hw/isa: Introduce IsaIrqNumber enum Date: Sun, 11 Oct 2020 21:32:20 +0200 Message-Id: <20201011193229.3210774-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201011193229.3210774-1-f4bug@amsat.org> References: <20201011193229.3210774-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S. Tsirkin" , Jason Wang , Mark Cave-Ayland , qemu-block@nongnu.org, Stefan Berger , qemu-trivial@nongnu.org, =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Artyom Tarasenko , Laurent Vivier , Thomas Huth , Eduardo Habkost , Corey Minyard , Paolo Bonzini , John Snow , Richard Henderson , Kevin Wolf , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Max Reitz , qemu-ppc@nongnu.org, Igor Mammedov , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We are going to list all default ISA IRQs. As all the definitions are related, introduce the IsaIrqNumber type to enumerate them. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/isa.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index ddaae89a853..2a052ffa025 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -8,7 +8,9 @@ #include "hw/qdev-core.h" #include "qom/object.h" -#define ISA_NUM_IRQS 16 +enum IsaIrqNumber { + ISA_NUM_IRQS = 16 +}; #define TYPE_ISA_DEVICE "isa-device" OBJECT_DECLARE_TYPE(ISADevice, ISADeviceClass, ISA_DEVICE) -- 2.26.2