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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: vijayakannan.ayyathurai@intel.com, thierry.reding@gmail.com,
	robh+dt@kernel.org, linux-pwm@vger.kernel.org,
	devicetree@vger.kernel.org,
	wan.ahmad.zainie.wan.mohamad@intel.com, mgross@linux.intel.com,
	lakshmi.bai.raja.subramanian@intel.com
Subject: Re: [PATCH v12 1/2] pwm: Add PWM driver for Intel Keem Bay
Date: Fri, 16 Oct 2020 12:24:20 +0300	[thread overview]
Message-ID: <20201016092420.GG4077@smile.fi.intel.com> (raw)
In-Reply-To: <20201016062439.lvpzbtxd4azku2fq@pengutronix.de>

On Fri, Oct 16, 2020 at 08:24:39AM +0200, Uwe Kleine-König wrote:
> On Thu, Oct 15, 2020 at 01:42:17PM +0300, Andy Shevchenko wrote:
> > On Thu, Oct 15, 2020 at 03:36:09AM +0800, vijayakannan.ayyathurai@intel.com wrote:
> > > From: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com>

...

> > > +	ret = pwmchip_add(&priv->chip);
> > > +	if (ret) {
> > > +		dev_err(dev, "Failed to add PWM chip: %pe\n", ERR_PTR(ret));
> > 
> > > +		clk_disable_unprepare(priv->clk);
> > 
> > This messes up with ordering of things.
> > 
> > That's why devm golden rule is either all or none. You may fix this by
> > switching to devm_add_action_or_reset().
> > 
> > One of possible way is like in below drivers:
> > 
> > 	% git grep -n devm_add_action_or_reset.*disable_unprepare -- drivers/
> > 
> > But it may be fixed in follow up change. Depends on maintainers' wishes.
> 
> I recently sent a patch to address this in a still more comfortable way:
>
> 	https://lore.kernel.org/r/20201013082132.661993-1-u.kleine-koenig@pengutronix.de

Good to know, thanks!

> Other than that I don't think there is a real issue to fix here, yes,
> the unroll order doesn't match the init order, but here this is about
> ioremap vs clk_prepare_enable, so I'm fine with the status quo.
> 
> (I assume I didn't miss a real issue here. Please tell if so.)

No, as you said and as I answered in previous reply that the more serious issue
(which you pointed out) has been replaced with less serious which can even be
addressed separately, but it's up to you and Thierry.

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2020-10-16  9:23 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-14 19:36 [PATCH v12 0/2] Add PWM support for Intel Keem Bay SoC vijayakannan.ayyathurai
2020-10-14 19:36 ` [PATCH v12 1/2] pwm: Add PWM driver for Intel Keem Bay vijayakannan.ayyathurai
2020-10-14 20:04   ` Uwe Kleine-König
2020-10-15 10:42   ` Andy Shevchenko
2020-10-16  3:18     ` Ayyathurai, Vijayakannan
2020-10-16  7:34       ` Uwe Kleine-König
2020-10-16  8:32         ` Ayyathurai, Vijayakannan
2020-10-16  9:25           ` Andy Shevchenko
2020-10-19  5:44         ` Ayyathurai, Vijayakannan
2020-10-19  6:42           ` Uwe Kleine-König
2020-10-16  9:21       ` Andy Shevchenko
2020-10-19  6:46         ` Uwe Kleine-König
2020-10-16  6:24     ` Uwe Kleine-König
2020-10-16  9:24       ` Andy Shevchenko [this message]
2020-10-14 19:36 ` [PATCH v12 2/2] dt-bindings: pwm: keembay: Add bindings for Intel Keem Bay PWM vijayakannan.ayyathurai
2020-10-16 16:04   ` Rob Herring
2020-10-16 19:34     ` Ayyathurai, Vijayakannan

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