From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05E38C388F2 for ; Tue, 20 Oct 2020 20:37:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AAA4A22247 for ; Tue, 20 Oct 2020 20:37:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2409542AbgJTUhT (ORCPT ); Tue, 20 Oct 2020 16:37:19 -0400 Received: from foss.arm.com ([217.140.110.172]:55924 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2409477AbgJTUhS (ORCPT ); Tue, 20 Oct 2020 16:37:18 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A693331B; Tue, 20 Oct 2020 13:37:17 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BCE6C3F719; Tue, 20 Oct 2020 13:37:16 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Viresh Kumar Subject: [PATCH 1/2] dt-bindings: arm,scmi: Do not use clocks for SCMI performance domains Date: Tue, 20 Oct 2020 21:37:09 +0100 Message-Id: <20201020203710.10100-1-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit dd461cd9183f ("opp: Allow dev_pm_opp_get_opp_table() to return -EPROBE_DEFER") handles -EPROBE_DEFER for the clock/interconnects within _allocate_opp_table() which is called from dev_pm_opp_add and it now propagates the error back to the caller. SCMI performance domain re-used clock bindings to keep it simple. However with the above mentioned change, if clock property is present in a device node, opps can't be added until clk_get succeeds. So in order to fix the issue, we can register dummy clocks which is completely ugly. Since there are no upstream users for the SCMI performance domain clock bindings, let us introduce separate performance domain bindings for the same. Signed-off-by: Sudeep Holla --- .../devicetree/bindings/arm/arm,scmi.txt | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) Hi Rob/Viresh, This is actually a fix for the regression I reported here[1]. I am not adding fixes tag as I am targeting in the same release and also because it is not directly related. Regards, Sudeep [1] https://lore.kernel.org/r/20201015180555.gacdzkofpibkdn2e@bogus P.S.:/me records that this binding needs to be moved to yaml in v5.11 diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt index 55deb68230eb..0a6c1b495403 100644 --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt +++ b/Documentation/devicetree/bindings/arm/arm,scmi.txt @@ -44,7 +44,7 @@ as described in the following sections. If the platform supports dedicated mboxes, mbox-names and shmem shall be present in the sub-node corresponding to that protocol. -Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol +Clock bindings for the clocks based on SCMI Message Protocol ------------------------------------------------------------ This binding uses the common clock binding[1]. @@ -52,6 +52,19 @@ This binding uses the common clock binding[1]. Required properties: - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. +Performance bindings for the OPPs based on SCMI Message Protocol +------------------------------------------------------------ + +Required properties: +- #perf-domain-cells: Should be 1. Contains the performance domain ID value + used by SCMI commands. + +* Property arm,scmi-perf-domain + +Devices supporting SCMI performance domain must set their "arm,scmi-perf-domain" +property with phandle to a SCMI performance domain controller followed by the +performance domain. + Power domain bindings for the power domains based on SCMI Message Protocol ------------------------------------------------------------ @@ -152,7 +165,7 @@ firmware { scmi_dvfs: protocol@13 { reg = <0x13>; - #clock-cells = <1>; + #perf-domain-cells = <1>; }; scmi_clk: protocol@14 { @@ -175,7 +188,7 @@ firmware { cpu@0 { ... reg = <0 0>; - clocks = <&scmi_dvfs 0>; + arm,scmi-perf-domain = <&scmi_dvfs 0>; }; hdlcd@7ff60000 { -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAA30C4363A for ; Tue, 20 Oct 2020 20:39:00 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 49F182224A for ; Tue, 20 Oct 2020 20:39:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="hbQvHY7B" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 49F182224A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Owner; bh=OdOzymFUnJhf7vDggu+cor9xqcWkgDj9g7xlU176Vyg=; b=hbQvHY7BhIgXAAftkRSKrT+Pr5 eII3IS2J9n2pH8F+qFoZpG4jy51/WAYO3SvJIsnpaRbmcLktNAK6KKR180pNeGuP+s2zuv+HJEwwd c8e4qCCcs/3kecf5qleAGCCyibUSOlBDjV1iFzgNJoxjHPYW9FVOE1nHZmovkiTM027h8vLCjnLzv HsAwGO6h2Lv9Jbfe4StOSSMJ+B+4ITCm5TQtnC70xYJeZJcGtoSJkEI/A5u5qFliTuKBJdxTBDYVB ayOjoVA4TAWCuNlklyWWc/TCWW4sz5+sGb2nQGxfUycmE8VTE5J6fUnSO7IgkV7DTP6/iXZTqVmY/ OtoBDKeA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kUyNq-0006Pu-Dj; Tue, 20 Oct 2020 20:37:26 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kUyNl-0006OU-ON for linux-arm-kernel@lists.infradead.org; Tue, 20 Oct 2020 20:37:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A693331B; Tue, 20 Oct 2020 13:37:17 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BCE6C3F719; Tue, 20 Oct 2020 13:37:16 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: arm, scmi: Do not use clocks for SCMI performance domains Date: Tue, 20 Oct 2020 21:37:09 +0100 Message-Id: <20201020203710.10100-1-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201020_163721_850206_46B04078 X-CRM114-Status: GOOD ( 16.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Viresh Kumar , Rob Herring , linux-arm-kernel@lists.infradead.org, Sudeep Holla MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Commit dd461cd9183f ("opp: Allow dev_pm_opp_get_opp_table() to return -EPROBE_DEFER") handles -EPROBE_DEFER for the clock/interconnects within _allocate_opp_table() which is called from dev_pm_opp_add and it now propagates the error back to the caller. SCMI performance domain re-used clock bindings to keep it simple. However with the above mentioned change, if clock property is present in a device node, opps can't be added until clk_get succeeds. So in order to fix the issue, we can register dummy clocks which is completely ugly. Since there are no upstream users for the SCMI performance domain clock bindings, let us introduce separate performance domain bindings for the same. Signed-off-by: Sudeep Holla --- .../devicetree/bindings/arm/arm,scmi.txt | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) Hi Rob/Viresh, This is actually a fix for the regression I reported here[1]. I am not adding fixes tag as I am targeting in the same release and also because it is not directly related. Regards, Sudeep [1] https://lore.kernel.org/r/20201015180555.gacdzkofpibkdn2e@bogus P.S.:/me records that this binding needs to be moved to yaml in v5.11 diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt index 55deb68230eb..0a6c1b495403 100644 --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt +++ b/Documentation/devicetree/bindings/arm/arm,scmi.txt @@ -44,7 +44,7 @@ as described in the following sections. If the platform supports dedicated mboxes, mbox-names and shmem shall be present in the sub-node corresponding to that protocol. -Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol +Clock bindings for the clocks based on SCMI Message Protocol ------------------------------------------------------------ This binding uses the common clock binding[1]. @@ -52,6 +52,19 @@ This binding uses the common clock binding[1]. Required properties: - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. +Performance bindings for the OPPs based on SCMI Message Protocol +------------------------------------------------------------ + +Required properties: +- #perf-domain-cells: Should be 1. Contains the performance domain ID value + used by SCMI commands. + +* Property arm,scmi-perf-domain + +Devices supporting SCMI performance domain must set their "arm,scmi-perf-domain" +property with phandle to a SCMI performance domain controller followed by the +performance domain. + Power domain bindings for the power domains based on SCMI Message Protocol ------------------------------------------------------------ @@ -152,7 +165,7 @@ firmware { scmi_dvfs: protocol@13 { reg = <0x13>; - #clock-cells = <1>; + #perf-domain-cells = <1>; }; scmi_clk: protocol@14 { @@ -175,7 +188,7 @@ firmware { cpu@0 { ... reg = <0 0>; - clocks = <&scmi_dvfs 0>; + arm,scmi-perf-domain = <&scmi_dvfs 0>; }; hdlcd@7ff60000 { -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel