From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85B60C55179 for ; Wed, 21 Oct 2020 16:30:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2308620870 for ; Wed, 21 Oct 2020 16:30:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502945AbgJUQa1 (ORCPT ); Wed, 21 Oct 2020 12:30:27 -0400 Received: from foss.arm.com ([217.140.110.172]:37442 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2438066AbgJUQa0 (ORCPT ); Wed, 21 Oct 2020 12:30:26 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6CDCD6E; Wed, 21 Oct 2020 09:30:25 -0700 (PDT) Received: from bogus (unknown [10.57.22.167]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 445CE3F719; Wed, 21 Oct 2020 09:30:24 -0700 (PDT) Date: Wed, 21 Oct 2020 17:30:21 +0100 From: Sudeep Holla To: Rob Herring Cc: "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org, Sudeep Holla , linux-arm-kernel , Viresh Kumar Subject: Re: [PATCH 1/2] dt-bindings: arm,scmi: Do not use clocks for SCMI performance domains Message-ID: <20201021163021.lkqhum3xnyzt6pir@bogus> References: <20201020203710.10100-1-sudeep.holla@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 21, 2020 at 11:20:27AM -0500, Rob Herring wrote: > On Tue, Oct 20, 2020 at 3:37 PM Sudeep Holla wrote: > > > > Commit dd461cd9183f ("opp: Allow dev_pm_opp_get_opp_table() to return > > -EPROBE_DEFER") handles -EPROBE_DEFER for the clock/interconnects within > > _allocate_opp_table() which is called from dev_pm_opp_add and it > > now propagates the error back to the caller. > > > > SCMI performance domain re-used clock bindings to keep it simple. However > > with the above mentioned change, if clock property is present in a device > > node, opps can't be added until clk_get succeeds. So in order to fix the > > issue, we can register dummy clocks which is completely ugly. > > > > Since there are no upstream users for the SCMI performance domain clock > > bindings, let us introduce separate performance domain bindings for the > > same. > > > > Signed-off-by: Sudeep Holla > > --- > > .../devicetree/bindings/arm/arm,scmi.txt | 19 ++++++++++++++++--- > > 1 file changed, 16 insertions(+), 3 deletions(-) > > > > Hi Rob/Viresh, > > > > This is actually a fix for the regression I reported here[1]. > > I am not adding fixes tag as I am targeting in the same release and > > also because it is not directly related. > > > > Regards, > > Sudeep > > > > [1] https://lore.kernel.org/r/20201015180555.gacdzkofpibkdn2e@bogus > > > > P.S.:/me records that this binding needs to be moved to yaml in v5.11 > > > > diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt > > index 55deb68230eb..0a6c1b495403 100644 > > --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt > > +++ b/Documentation/devicetree/bindings/arm/arm,scmi.txt > > @@ -44,7 +44,7 @@ as described in the following sections. If the platform supports dedicated > > mboxes, mbox-names and shmem shall be present in the sub-node corresponding > > to that protocol. > > > > -Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol > > +Clock bindings for the clocks based on SCMI Message Protocol > > ------------------------------------------------------------ > > > > This binding uses the common clock binding[1]. > > @@ -52,6 +52,19 @@ This binding uses the common clock binding[1]. > > Required properties: > > - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. > > > > +Performance bindings for the OPPs based on SCMI Message Protocol > > +------------------------------------------------------------ > > + > > +Required properties: > > +- #perf-domain-cells: Should be 1. Contains the performance domain ID value > > + used by SCMI commands. > > When is this not 1 (IOW, you only need this if variable)? How would it > be used outside SCMI (given it has a generic name)? > Ah, I thought we need this if phandle is followed by 1 or more arguments. If it is not compulsory I can drop this or make it scmi specific if we need it. > > + > > +* Property arm,scmi-perf-domain > > Yet this doesn't have a generic name. You mentioned on IRC this is > aligned with QCom, but why can't QCom use the same property here? > This is SCMI firmware driven while they have hardware driven perf/freq domains. So different drivers, need to distinguish between the two. > Really though, why can't you give SCMI a CPUs MPIDR and get its domain? Not a bad idea, will check if we can add this to the future specification. Anyways we still need something with existing version of the spec. -- Regards, Sudeep From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE9ABC388F9 for ; Wed, 21 Oct 2020 16:31:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3137220870 for ; Wed, 21 Oct 2020 16:31:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="YeSDXSRS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3137220870 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=x7WNFO4JM82x5XgHHCezGktj8uuVgNZgucYuGAR9bwM=; b=YeSDXSRSFjer/e6Ehe9sV+J9L bIXkcqdOzhm19QpHjlFGiiwuliFt7PpphaznhcCVdMPoIYc9NGI1CGj12T4eHoQ23ctzx6r9d7x2A g8L0a+GIWli1Z/0NykmjjLCtG0jgDU90ObgddMglix8QIUjfwE8AZ76RNm8Wg7NEm/t36fjbnKRyu yxQXmOPH+7ssPuuNbZf/OYuIwYC07IprlY8Lxvp2xFMUvPg3NceSZurtbHAyoDmvHCeenA/1N3fSe ROgKDVG6oNqVzOqyl0AP6f/3QUUo+u4SjMIzpUNF5vB5lRnYKXvEjXt0TPe3b5eJBz0qb47oWXSRu 8d7Sc4iOQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kVH0S-0004u8-Rv; Wed, 21 Oct 2020 16:30:32 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kVH0P-0004tW-L0 for linux-arm-kernel@lists.infradead.org; Wed, 21 Oct 2020 16:30:30 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6CDCD6E; Wed, 21 Oct 2020 09:30:25 -0700 (PDT) Received: from bogus (unknown [10.57.22.167]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 445CE3F719; Wed, 21 Oct 2020 09:30:24 -0700 (PDT) Date: Wed, 21 Oct 2020 17:30:21 +0100 From: Sudeep Holla To: Rob Herring Subject: Re: [PATCH 1/2] dt-bindings: arm,scmi: Do not use clocks for SCMI performance domains Message-ID: <20201021163021.lkqhum3xnyzt6pir@bogus> References: <20201020203710.10100-1-sudeep.holla@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201021_123029_858113_C47F8704 X-CRM114-Status: GOOD ( 34.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Viresh Kumar , "linux-kernel@vger.kernel.org" , linux-arm-kernel , Sudeep Holla Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 21, 2020 at 11:20:27AM -0500, Rob Herring wrote: > On Tue, Oct 20, 2020 at 3:37 PM Sudeep Holla wrote: > > > > Commit dd461cd9183f ("opp: Allow dev_pm_opp_get_opp_table() to return > > -EPROBE_DEFER") handles -EPROBE_DEFER for the clock/interconnects within > > _allocate_opp_table() which is called from dev_pm_opp_add and it > > now propagates the error back to the caller. > > > > SCMI performance domain re-used clock bindings to keep it simple. However > > with the above mentioned change, if clock property is present in a device > > node, opps can't be added until clk_get succeeds. So in order to fix the > > issue, we can register dummy clocks which is completely ugly. > > > > Since there are no upstream users for the SCMI performance domain clock > > bindings, let us introduce separate performance domain bindings for the > > same. > > > > Signed-off-by: Sudeep Holla > > --- > > .../devicetree/bindings/arm/arm,scmi.txt | 19 ++++++++++++++++--- > > 1 file changed, 16 insertions(+), 3 deletions(-) > > > > Hi Rob/Viresh, > > > > This is actually a fix for the regression I reported here[1]. > > I am not adding fixes tag as I am targeting in the same release and > > also because it is not directly related. > > > > Regards, > > Sudeep > > > > [1] https://lore.kernel.org/r/20201015180555.gacdzkofpibkdn2e@bogus > > > > P.S.:/me records that this binding needs to be moved to yaml in v5.11 > > > > diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt > > index 55deb68230eb..0a6c1b495403 100644 > > --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt > > +++ b/Documentation/devicetree/bindings/arm/arm,scmi.txt > > @@ -44,7 +44,7 @@ as described in the following sections. If the platform supports dedicated > > mboxes, mbox-names and shmem shall be present in the sub-node corresponding > > to that protocol. > > > > -Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol > > +Clock bindings for the clocks based on SCMI Message Protocol > > ------------------------------------------------------------ > > > > This binding uses the common clock binding[1]. > > @@ -52,6 +52,19 @@ This binding uses the common clock binding[1]. > > Required properties: > > - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. > > > > +Performance bindings for the OPPs based on SCMI Message Protocol > > +------------------------------------------------------------ > > + > > +Required properties: > > +- #perf-domain-cells: Should be 1. Contains the performance domain ID value > > + used by SCMI commands. > > When is this not 1 (IOW, you only need this if variable)? How would it > be used outside SCMI (given it has a generic name)? > Ah, I thought we need this if phandle is followed by 1 or more arguments. If it is not compulsory I can drop this or make it scmi specific if we need it. > > + > > +* Property arm,scmi-perf-domain > > Yet this doesn't have a generic name. You mentioned on IRC this is > aligned with QCom, but why can't QCom use the same property here? > This is SCMI firmware driven while they have hardware driven perf/freq domains. So different drivers, need to distinguish between the two. > Really though, why can't you give SCMI a CPUs MPIDR and get its domain? Not a bad idea, will check if we can add this to the future specification. Anyways we still need something with existing version of the spec. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel