From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 05/20] drm/i915: Introduce AUX_CH_USBCn
Date: Fri, 23 Oct 2020 02:56:21 +0300 [thread overview]
Message-ID: <20201022235621.GU6112@intel.com> (raw)
In-Reply-To: <20201008085230.76522yxdanfacp6l@ldmartin-desk1>
On Thu, Oct 08, 2020 at 01:52:30AM -0700, Lucas De Marchi wrote:
> On Thu, Oct 08, 2020 at 11:40:28AM +0300, Ville Syrjälä wrote:
> >On Wed, Oct 07, 2020 at 03:51:11PM -0700, Lucas De Marchi wrote:
> >> On Tue, Oct 06, 2020 at 05:33:34PM +0300, Ville Syrjälä wrote:
> >> >From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> >
> >> >Just like with the DDIs tgl+ renamed the AUX CHs to reflect
> >> >the type of the DDI. Let's add the aliasing enum values for
> >> >the type-C AUX CHs.
> >> >
> >> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> >---
> >> > drivers/gpu/drm/i915/display/intel_display.h | 8 +++
> >> > drivers/gpu/drm/i915/display/intel_dp.c | 53 ++++++++++++++++++--
> >> > 2 files changed, 58 insertions(+), 3 deletions(-)
> >> >
> >> >diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> >> >index a39be3c9e0cf..cba876721ea0 100644
> >> >--- a/drivers/gpu/drm/i915/display/intel_display.h
> >> >+++ b/drivers/gpu/drm/i915/display/intel_display.h
> >> >@@ -290,6 +290,14 @@ enum aux_ch {
> >> > AUX_CH_G,
> >> > AUX_CH_H,
> >> > AUX_CH_I,
> >> >+
> >> >+ /* tgl+ */
> >> >+ AUX_CH_USBC1 = AUX_CH_D,
> >> >+ AUX_CH_USBC2,
> >> >+ AUX_CH_USBC3,
> >> >+ AUX_CH_USBC4,
> >> >+ AUX_CH_USBC5,
> >> >+ AUX_CH_USBC6,
> >> > };
> >> >
> >> > #define aux_ch_name(a) ((a) + 'A')
> >> >diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> >index 239016dcd544..a73c354c920e 100644
> >> >--- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> >+++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> >@@ -1792,7 +1792,6 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
> >> > case AUX_CH_D:
> >> > case AUX_CH_E:
> >> > case AUX_CH_F:
> >> >- case AUX_CH_G:
> >> > return DP_AUX_CH_CTL(aux_ch);
> >> > default:
> >> > MISSING_CASE(aux_ch);
> >> >@@ -1813,7 +1812,52 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
> >> > case AUX_CH_D:
> >> > case AUX_CH_E:
> >> > case AUX_CH_F:
> >> >- case AUX_CH_G:
> >> >+ return DP_AUX_CH_DATA(aux_ch, index);
> >> >+ default:
> >> >+ MISSING_CASE(aux_ch);
> >> >+ return DP_AUX_CH_DATA(AUX_CH_A, index);
> >> >+ }
> >> >+}
> >> >+
> >> >+static i915_reg_t tgl_aux_ctl_reg(struct intel_dp *intel_dp)
> >> >+{
> >> >+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >> >+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >> >+ enum aux_ch aux_ch = dig_port->aux_ch;
> >> >+
> >> >+ switch (aux_ch) {
> >> >+ case AUX_CH_A:
> >> >+ case AUX_CH_B:
> >> >+ case AUX_CH_C:
> >> >+ case AUX_CH_USBC1:
> >> >+ case AUX_CH_USBC2:
> >> >+ case AUX_CH_USBC3:
> >> >+ case AUX_CH_USBC4:
> >> >+ case AUX_CH_USBC5:
> >> >+ case AUX_CH_USBC6:
> >> >+ return DP_AUX_CH_CTL(aux_ch);
> >> >+ default:
> >> >+ MISSING_CASE(aux_ch);
> >> >+ return DP_AUX_CH_CTL(AUX_CH_A);
> >> >+ }
> >> >+}
> >> >+
> >> >+static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index)
> >> >+{
> >> >+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >> >+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >> >+ enum aux_ch aux_ch = dig_port->aux_ch;
> >> >+
> >> >+ switch (aux_ch) {
> >> >+ case AUX_CH_A:
> >> >+ case AUX_CH_B:
> >> >+ case AUX_CH_C:
> >> >+ case AUX_CH_USBC1:
> >> >+ case AUX_CH_USBC2:
> >> >+ case AUX_CH_USBC3:
> >> >+ case AUX_CH_USBC4:
> >> >+ case AUX_CH_USBC5:
> >> >+ case AUX_CH_USBC6:
> >> > return DP_AUX_CH_DATA(aux_ch, index);
> >> > default:
> >> > MISSING_CASE(aux_ch);
> >> >@@ -1834,7 +1878,10 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
> >> > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> >> > struct intel_encoder *encoder = &dig_port->base;
> >> >
> >> >- if (INTEL_GEN(dev_priv) >= 9) {
> >> >+ if (INTEL_GEN(dev_priv) >= 12) {
> >> >+ intel_dp->aux_ch_ctl_reg = tgl_aux_ctl_reg;
> >>
> >> why is this even a function pointer rather than just the reg? AFAICS it
> >> only depends on dig_port->aux_ch that is initialized in intel_ddi_init()
> >
> >Just for consistency with .aux_ch_data_reg() I guess. Can't remember
> >a more specific reason at least.
>
> even that may be overkill since all the users just use index to
> do `+ index * 4`
The code used to do that but we got rid of it when the i915_reg
stuff was introduced to discourage people from doing hand rolled
arithmetic on register offsets. I think the tradeoff has been
generally worth it because I can't remeber the last time someone
messed up the register offsets. Before type safety it was a
somewhat regular occurance.
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-10-22 23:56 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-06 14:33 [Intel-gfx] [PATCH 00/20] drm/i915: Futher cleanup around hpd pins and port identfiers Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 01/20] drm/i915: Sort the mess around ICP TC hotplugs regs Ville Syrjala
2020-10-07 22:11 ` Lucas De Marchi
2020-10-22 23:22 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 02/20] drm/i915: s/PORT_TC/TC_PORT_TC/ Ville Syrjala
2020-10-07 22:22 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 03/20] drm/i915: Add PORT_TCn aliases to enum port Ville Syrjala
2020-10-07 22:28 ` Lucas De Marchi
2020-10-08 8:34 ` Ville Syrjälä
2020-10-06 14:33 ` [Intel-gfx] [PATCH 04/20] drm/i915: Give DDI encoders even better names Ville Syrjala
2020-10-07 22:36 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 05/20] drm/i915: Introduce AUX_CH_USBCn Ville Syrjala
2020-10-07 22:51 ` Lucas De Marchi
2020-10-08 8:40 ` Ville Syrjälä
2020-10-08 8:52 ` Lucas De Marchi
2020-10-22 23:56 ` Ville Syrjälä [this message]
2020-10-23 0:01 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 06/20] drm/i915: Pimp AUX CH names Ville Syrjala
2020-10-07 23:01 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 07/20] drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setup Ville Syrjala
2020-10-07 23:11 ` Lucas De Marchi
2020-10-08 8:43 ` Ville Syrjälä
2020-10-06 14:33 ` [Intel-gfx] [PATCH 08/20] drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pin Ville Syrjala
2020-10-06 16:25 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2020-10-07 23:17 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 09/20] drm/i915: Introduce GEN8_DE_PORT_HOTPLUG() Ville Syrjala
2020-10-06 16:25 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2020-10-07 23:17 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 10/20] drm/i915: s/port/hpd_pin/ for icp+ ddi hpd bits Ville Syrjala
2020-10-07 23:22 ` Lucas De Marchi
2020-10-06 14:33 ` [Intel-gfx] [PATCH 11/20] drm/i915: s/tc_port/hpd_pin/ in GEN11_{TC, TBT}_HOTPLUG() Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 12/20] drm/i915: s/tc_port/hpd_pin/ in icp+ TC hotplug bits Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 13/20] drm/i915: Relocate intel_hpd_{enabled, hotplug}_irqs() Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 14/20] drm/i915: Split gen11_hpd_detection_setup() into tc vs. tbt variants Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 15/20] drm/i915: Don't enable hpd detection logic from irq_postinstall() Ville Syrjala
2020-10-06 16:20 ` Imre Deak
2020-10-06 16:43 ` Ville Syrjälä
2020-10-06 14:33 ` [Intel-gfx] [PATCH 16/20] drm/i915: Rename 'tmp_mask' Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 17/20] drm/i915: Remove the per-plaform IIR HPD masking Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 18/20] drm/i915: Enable hpd logic only for ports that are present Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 19/20] drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+ Ville Syrjala
2020-10-06 14:33 ` [Intel-gfx] [PATCH 20/20] drm/i915: Get rid of ibx_irq_pre_postinstall() Ville Syrjala
2020-10-06 15:21 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Futher cleanup around hpd pins and port identfiers Patchwork
2020-10-06 17:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Futher cleanup around hpd pins and port identfiers (rev3) Patchwork
2020-10-06 17:08 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-06 17:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-06 21:52 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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