From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.0 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B4CFC388F9 for ; Fri, 23 Oct 2020 10:08:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DA7CE2225F for ; Fri, 23 Oct 2020 10:08:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="zy/rP3W8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S461910AbgJWKIW (ORCPT ); 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Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:49920) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kVtzZ-0003Gk-N8; Fri, 23 Oct 2020 11:08:13 +0100 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1kVtzW-0008LM-Go; Fri, 23 Oct 2020 11:08:10 +0100 Date: Fri, 23 Oct 2020 11:08:10 +0100 From: Russell King - ARM Linux admin To: Miles Chen Cc: Catalin Marinas , Minchan Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, wsd_upstream@mediatek.com, Will Deacon , Steve Capper , Suren Baghdasaryan Subject: Re: [PATCH v2 3/4] arm: mm: introduce L_PTE_SPECIAL Message-ID: <20201023100810.GY1551@shell.armlinux.org.uk> References: <20201023091437.8225-1-miles.chen@mediatek.com> <20201023091437.8225-4-miles.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201023091437.8225-4-miles.chen@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: Russell King - ARM Linux admin Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 23, 2020 at 05:14:36PM +0800, Miles Chen wrote: > From: Minchan Kim > > This patch introduces L_PTE_SPECIAL and pte functions for supporting > get_user_pages_fast. > > Cc: Russell King > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Steve Capper > Cc: Minchan Kim > Cc: Suren Baghdasaryan > Signed-off-by: Minchan Kim > Signed-off-by: Miles Chen > --- > arch/arm/Kconfig | 4 ++-- > arch/arm/include/asm/pgtable-2level.h | 1 + > arch/arm/include/asm/pgtable-3level.h | 6 ------ > arch/arm/include/asm/pgtable.h | 13 +++++++++++++ > 4 files changed, 16 insertions(+), 8 deletions(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index c18fa9d382b7..1f75864b7c7a 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -13,7 +13,7 @@ config ARM > select ARCH_HAS_KCOV > select ARCH_HAS_MEMBARRIER_SYNC_CORE > select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE > - select ARCH_HAS_PTE_SPECIAL if ARM_LPAE > + select ARCH_HAS_PTE_SPECIAL if (ARM_LPAE || CPU_V7 || CPU_V6 || CPUV6K) > select ARCH_HAS_PHYS_TO_DMA > select ARCH_HAS_SETUP_DMA_OPS > select ARCH_HAS_SET_MEMORY > @@ -82,7 +82,7 @@ config ARM > select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE > select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU > select HAVE_EXIT_THREAD > - select HAVE_FAST_GUP if ARM_LPAE > + select HAVE_FAST_GUP if (ARM_LPAE || CPU_V7 || CPU_V6 || CPUV6K) > select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL > select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG > select HAVE_FUNCTION_TRACER if !XIP_KERNEL > diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h > index cdcd55cca37d..385e7a32394e 100644 > --- a/arch/arm/include/asm/pgtable-2level.h > +++ b/arch/arm/include/asm/pgtable-2level.h > @@ -117,6 +117,7 @@ > #define L_PTE_VALID (_AT(pteval_t, 1) << 0) /* Valid */ > #define L_PTE_PRESENT (_AT(pteval_t, 1) << 0) > #define L_PTE_YOUNG (_AT(pteval_t, 1) << 1) > +#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 5) How does this work? Bits 2 through 5 are already in use for the memory type. Repurposing this bit means that L_PTE_MT_DEV_NONSHARED, L_PTE_MT_DEV_WC, L_PTE_MT_DEV_CACHED and L_PTE_MT_VECTORS clash with it. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! 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Received: from shell.armlinux.org.uk ([fd8f:7570:feb6:1:5054:ff:fe00:4ec]:49920) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kVtzZ-0003Gk-N8; Fri, 23 Oct 2020 11:08:13 +0100 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1kVtzW-0008LM-Go; Fri, 23 Oct 2020 11:08:10 +0100 Date: Fri, 23 Oct 2020 11:08:10 +0100 From: Russell King - ARM Linux admin To: Miles Chen Subject: Re: [PATCH v2 3/4] arm: mm: introduce L_PTE_SPECIAL Message-ID: <20201023100810.GY1551@shell.armlinux.org.uk> References: <20201023091437.8225-1-miles.chen@mediatek.com> <20201023091437.8225-4-miles.chen@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201023091437.8225-4-miles.chen@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201023_060821_566001_730A0F68 X-CRM114-Status: GOOD ( 17.83 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Steve Capper , wsd_upstream@mediatek.com, Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Minchan Kim , linux-mediatek@lists.infradead.org, Suren Baghdasaryan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Fri, Oct 23, 2020 at 05:14:36PM +0800, Miles Chen wrote: > From: Minchan Kim > > This patch introduces L_PTE_SPECIAL and pte functions for supporting > get_user_pages_fast. > > Cc: Russell King > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Steve Capper > Cc: Minchan Kim > Cc: Suren Baghdasaryan > Signed-off-by: Minchan Kim > Signed-off-by: Miles Chen > --- > arch/arm/Kconfig | 4 ++-- > arch/arm/include/asm/pgtable-2level.h | 1 + > arch/arm/include/asm/pgtable-3level.h | 6 ------ > arch/arm/include/asm/pgtable.h | 13 +++++++++++++ > 4 files changed, 16 insertions(+), 8 deletions(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index c18fa9d382b7..1f75864b7c7a 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -13,7 +13,7 @@ config ARM > select ARCH_HAS_KCOV > select ARCH_HAS_MEMBARRIER_SYNC_CORE > select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE > - select ARCH_HAS_PTE_SPECIAL if ARM_LPAE > + select ARCH_HAS_PTE_SPECIAL if (ARM_LPAE || CPU_V7 || CPU_V6 || CPUV6K) > select ARCH_HAS_PHYS_TO_DMA > select ARCH_HAS_SETUP_DMA_OPS > select ARCH_HAS_SET_MEMORY > @@ -82,7 +82,7 @@ config ARM > select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE > select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU > select HAVE_EXIT_THREAD > - select HAVE_FAST_GUP if ARM_LPAE > + select HAVE_FAST_GUP if (ARM_LPAE || CPU_V7 || CPU_V6 || CPUV6K) > select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL > select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG > select HAVE_FUNCTION_TRACER if !XIP_KERNEL > diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h > index cdcd55cca37d..385e7a32394e 100644 > --- a/arch/arm/include/asm/pgtable-2level.h > +++ b/arch/arm/include/asm/pgtable-2level.h > @@ -117,6 +117,7 @@ > #define L_PTE_VALID (_AT(pteval_t, 1) << 0) /* Valid */ > #define L_PTE_PRESENT (_AT(pteval_t, 1) << 0) > #define L_PTE_YOUNG (_AT(pteval_t, 1) << 1) > +#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 5) How does this work? Bits 2 through 5 are already in use for the memory type. Repurposing this bit means that L_PTE_MT_DEV_NONSHARED, L_PTE_MT_DEV_WC, L_PTE_MT_DEV_CACHED and L_PTE_MT_VECTORS clash with it. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71E1FC388F9 for ; Fri, 23 Oct 2020 10:10:10 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 79F3620874 for ; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 23, 2020 at 05:14:36PM +0800, Miles Chen wrote: > From: Minchan Kim > > This patch introduces L_PTE_SPECIAL and pte functions for supporting > get_user_pages_fast. > > Cc: Russell King > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Steve Capper > Cc: Minchan Kim > Cc: Suren Baghdasaryan > Signed-off-by: Minchan Kim > Signed-off-by: Miles Chen > --- > arch/arm/Kconfig | 4 ++-- > arch/arm/include/asm/pgtable-2level.h | 1 + > arch/arm/include/asm/pgtable-3level.h | 6 ------ > arch/arm/include/asm/pgtable.h | 13 +++++++++++++ > 4 files changed, 16 insertions(+), 8 deletions(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index c18fa9d382b7..1f75864b7c7a 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -13,7 +13,7 @@ config ARM > select ARCH_HAS_KCOV > select ARCH_HAS_MEMBARRIER_SYNC_CORE > select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE > - select ARCH_HAS_PTE_SPECIAL if ARM_LPAE > + select ARCH_HAS_PTE_SPECIAL if (ARM_LPAE || CPU_V7 || CPU_V6 || CPUV6K) > select ARCH_HAS_PHYS_TO_DMA > select ARCH_HAS_SETUP_DMA_OPS > select ARCH_HAS_SET_MEMORY > @@ -82,7 +82,7 @@ config ARM > select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE > select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU > select HAVE_EXIT_THREAD > - select HAVE_FAST_GUP if ARM_LPAE > + select HAVE_FAST_GUP if (ARM_LPAE || CPU_V7 || CPU_V6 || CPUV6K) > select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL > select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG > select HAVE_FUNCTION_TRACER if !XIP_KERNEL > diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h > index cdcd55cca37d..385e7a32394e 100644 > --- a/arch/arm/include/asm/pgtable-2level.h > +++ b/arch/arm/include/asm/pgtable-2level.h > @@ -117,6 +117,7 @@ > #define L_PTE_VALID (_AT(pteval_t, 1) << 0) /* Valid */ > #define L_PTE_PRESENT (_AT(pteval_t, 1) << 0) > #define L_PTE_YOUNG (_AT(pteval_t, 1) << 1) > +#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 5) How does this work? Bits 2 through 5 are already in use for the memory type. Repurposing this bit means that L_PTE_MT_DEV_NONSHARED, L_PTE_MT_DEV_WC, L_PTE_MT_DEV_CACHED and L_PTE_MT_VECTORS clash with it. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel