From: Maciej Fijalkowski <maciej.fijalkowski@intel.com>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [PATCH v5] i40e: add support for PTP external synchronization clock
Date: Fri, 23 Oct 2020 12:42:50 +0200 [thread overview]
Message-ID: <20201023104250.GA5254@ranger.igk.intel.com> (raw)
In-Reply-To: <20201023103836.25826-1-piotr.kwapulinski@intel.com>
On Fri, Oct 23, 2020 at 10:38:36AM +0000, Piotr Kwapulinski wrote:
> Add support for external synchronization clock via GPIOs.
> 1PPS signals are handled via the dedicated 3 GPIOs: SDP3_2,
> SDP3_3 and GPIO_4.
> Previously it was not possible to use the external PTP
> synchronization clock.
>
Where is the changelog?
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> Signed-off-by: Piotr Kwapulinski <piotr.kwapulinski@intel.com>
> ---
> drivers/net/ethernet/intel/i40e/i40e.h | 76 +-
> drivers/net/ethernet/intel/i40e/i40e_main.c | 18 +-
> drivers/net/ethernet/intel/i40e/i40e_ptp.c | 748 +++++++++++++++++-
> .../net/ethernet/intel/i40e/i40e_register.h | 31 +-
> 4 files changed, 846 insertions(+), 27 deletions(-)
next prev parent reply other threads:[~2020-10-23 10:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-28 13:47 [Intel-wired-lan] [PATCH v3] i40e: add support for PTP external synchronization clock Piotr Kwapulinski
2020-07-31 21:31 ` Bowers, AndrewX
2020-10-23 10:38 ` [Intel-wired-lan] [PATCH v5] " Piotr Kwapulinski
2020-10-23 10:42 ` Maciej Fijalkowski [this message]
2020-10-23 11:15 ` [Intel-wired-lan] [PATCH v6] " Piotr Kwapulinski
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