Re: [OE-core][dunfell 00/14] Pull request (cover letter only)

From: "Martin Jansa" <Martin.Jansa@gmail.com>
To: Steve Sakoman <steve@sakoman.com>
Cc: openembedded-core@lists.openembedded.org
Subject: Re: [OE-core][dunfell 00/14] Pull request (cover letter only)
Date: Tue, 27 Oct 2020 10:24:33 +0100	[thread overview]
Message-ID: <20201027092433.mtsr6bucqhzitixf@jama> (raw)
In-Reply-To: <cover.1603760941.git.steve@sakoman.com>

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On Mon, Oct 26, 2020 at 03:10:48PM -1000, Steve Sakoman wrote:
> The following changes since commit 3ee9590f96cb50e93864db768b254773e2ff9465:
> 
>   uninative: Fix typo in error message (2020-10-19 04:27:15 -1000)
> 
> are available in the Git repository at:
> 
>   git://git.openembedded.org/openembedded-core-contrib stable/dunfell-next
>   http://cgit.openembedded.org/openembedded-core-contrib/log/?h=stable/dunfell-next
> 
> Alexander Kanavin (1):
>   selftest/virgl: drop the custom 30 sec timeout
> 
> Changqing Li (1):
>   toolchain-shar-extract.sh: don't print useless info
> 
> Khem Raj (1):
>   packagegroup-core-tools-debug: Disable for rv32/glibc as well
> 
> Lee Chee Yang (3):
>   libproxy: fix CVE-2020-25219
>   python3: fix CVE-2020-26116
>   grub2: fix CVE-2020-10713
> 
> Martin Jansa (7):
>   arch-armv7a.inc: fix typo
>   arch-mips.inc: remove duplicated mips64el-o32 from
>     PACKAGE_EXTRA_ARCHS_tune-mips64el-o32
>   tune-mips64r6.inc: fix typo in mipsisa64r6-nf
>   tune-ep9312.inc: add t suffix for thumb to
>     PACKAGE_EXTRA_ARCHS_tune-ep9312
>   tune-riscv.inc: use nf suffix also for TUNE_PKGARCH
>   siteinfo: Recognize 32bit PPC LE
>   siteinfo: Recognize bigendian sh3be and sh4be

Did you run tune/test.sh script with these on dunfell or do you want me to?

It looks OK, but would be good to confirm that it fixes all issues
currently in dunfell.

> Victor Kamensky (1):
>   qemu: change TLBs number to 64 in 34Kf mips cpu model
> 
>  meta-selftest/lib/oeqa/runtime/cases/virgl.py |   2 +-
>  meta/classes/siteinfo.bbclass                 |   5 +
>  meta/conf/machine/include/arm/arch-armv7a.inc |   2 +-
>  meta/conf/machine/include/mips/arch-mips.inc  |   2 +-
>  .../conf/machine/include/riscv/tune-riscv.inc |   4 +-
>  meta/conf/machine/include/tune-ep9312.inc     |   3 +-
>  meta/conf/machine/include/tune-mips64r6.inc   |   2 +-
>  meta/files/toolchain-shar-extract.sh          |   2 +-
>  .../grub/files/CVE-2020-10713.patch           |  73 ++++++++++++
>  meta/recipes-bsp/grub/grub2.inc               |   1 +
>  .../packagegroup-core-tools-debug.bb          |   2 +-
>  .../python/python3/CVE-2020-26116.patch       | 104 ++++++++++++++++++
>  meta/recipes-devtools/python/python3_3.8.2.bb |   1 +
>  meta/recipes-devtools/qemu/qemu.inc           |   1 +
>  ...ease-number-of-TLB-entries-on-the-34.patch |  59 ++++++++++
>  .../libproxy/libproxy/CVE-2020-25219.patch    |  61 ++++++++++
>  .../libproxy/libproxy_0.4.15.bb               |   1 +
>  17 files changed, 315 insertions(+), 10 deletions(-)
>  create mode 100644 meta/recipes-bsp/grub/files/CVE-2020-10713.patch
>  create mode 100644 meta/recipes-devtools/python/python3/CVE-2020-26116.patch
>  create mode 100644 meta/recipes-devtools/qemu/qemu/0001-target-mips-Increase-number-of-TLB-entries-on-the-34.patch
>  create mode 100644 meta/recipes-support/libproxy/libproxy/CVE-2020-25219.patch
> 
> -- 
> 2.17.1
> 

> 
> 
> 

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