From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB7D9C5517A for ; Sat, 31 Oct 2020 18:52:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7442320659 for ; Sat, 31 Oct 2020 18:52:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604170330; bh=NgA6N01IC4MfkFs0igFXXfwZNvymcYzAxkgKMJSZPMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=0bT4/3omGlKkRQ+i6AvuZMLy3aKGjF/ssV3N8oW3H3nQq4L5wkYmKoZ6B5eq22CQI PQ4tOJ3nCoMqkZnfNIJUhk1ZC1ZTpO5+LMij6Ryf+vGaeTRVwp1B85sA8ukd67A4WW m7kNolz6uarNJMYRUxwBzsYWqcJ5mhOodDITGPlM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728454AbgJaSwJ (ORCPT ); Sat, 31 Oct 2020 14:52:09 -0400 Received: from mail.kernel.org ([198.145.29.99]:35484 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728399AbgJaSwJ (ORCPT ); Sat, 31 Oct 2020 14:52:09 -0400 Received: from localhost.localdomain (cpc149474-cmbg20-2-0-cust94.5-4.cable.virginm.net [82.4.196.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4636320724; Sat, 31 Oct 2020 18:52:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604170328; bh=NgA6N01IC4MfkFs0igFXXfwZNvymcYzAxkgKMJSZPMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VOYb0IabtPbF4z8pSZINIeJ8nFkx5jg/ooBdEBUU7MdUP+sQmVFNV5YY6WfwYPwzU 0NlwVqDb5lNlfSRYmMWRbycfY0AQZuGxs1C/cEl3tN4aWEFD2NTAJR2LsJTgV+WrkH Cu5CRWKk0669BooIUALJ54oQ6aDwuoLMuo7u8PHw= From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Jonathan Cameron , Ludovic Desroches , Eugen Hristev Subject: [PATCH 28/46] dt-bindings:iio:adc:atmel,sama5d2-adc: txt to yaml conversion Date: Sat, 31 Oct 2020 18:48:36 +0000 Message-Id: <20201031184854.745828-29-jic23@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201031184854.745828-1-jic23@kernel.org> References: <20201031184854.745828-1-jic23@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron Whilst this binding has a lot of elements they are all fairly standard. Hence pretty much direct txt to yaml line by line conversion. Signed-off-by: Jonathan Cameron Cc: Ludovic Desroches Cc: Eugen Hristev --- .../bindings/iio/adc/at91-sama5d2_adc.txt | 50 --------- .../bindings/iio/adc/atmel,sama5d2-adc.yaml | 104 ++++++++++++++++++ 2 files changed, 104 insertions(+), 50 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt b/Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt deleted file mode 100644 index 07c59f301b31..000000000000 --- a/Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt +++ /dev/null @@ -1,50 +0,0 @@ -* AT91 SAMA5D2 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "atmel,sama5d2-adc" or "microchip,sam9x60-adc". - - reg: Should contain ADC registers location and length. - - interrupts: Should contain the IRQ line for the ADC. - - clocks: phandle to device clock. - - clock-names: Must be "adc_clk". - - vref-supply: Supply used as reference for conversions. - - vddana-supply: Supply for the adc device. - - atmel,min-sample-rate-hz: Minimum sampling rate, it depends on SoC. - - atmel,max-sample-rate-hz: Maximum sampling rate, it depends on SoC. - - atmel,startup-time-ms: Startup time expressed in ms, it depends on SoC. - - atmel,trigger-edge-type: One of possible edge types for the ADTRG hardware - trigger pin. When the specific edge type is detected, the conversion will - start. Possible values are rising, falling, or both. - This property uses the IRQ edge types values: IRQ_TYPE_EDGE_RISING , - IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH - -Optional properties: - - dmas: Phandle to dma channel for the ADC. - - dma-names: Must be "rx" when dmas property is being used. - See ../../dma/dma.txt for details. - - #io-channel-cells: in case consumer drivers are attached, this must be 1. - See for details. - -Properties for consumer drivers: - - Consumer drivers can be connected to this producer device, as specified - in - - Channels exposed are specified in: - - -Example: - -adc: adc@fc030000 { - compatible = "atmel,sama5d2-adc"; - reg = <0xfc030000 0x100>; - interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&adc_clk>; - clock-names = "adc_clk"; - atmel,min-sample-rate-hz = <200000>; - atmel,max-sample-rate-hz = <20000000>; - atmel,startup-time-ms = <4>; - vddana-supply = <&vdd_3v3_lp_reg>; - vref-supply = <&vdd_3v3_lp_reg>; - atmel,trigger-edge-type = ; - dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; - dma-names = "rx"; - #io-channel-cells = <1>; -} diff --git a/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml b/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml new file mode 100644 index 000000000000..9b282c3ee8fb --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AT91 SAMA5D2 Analog to Digital Converter (ADC) + +maintainers: + - Ludovic Desroches + - Eugen Hristev + +properties: + compatible: + enum: + - atmel,sama5d2-adc + - microchip,sam9x60-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: adc_clk + + vref-supply: true + vddana-supply: true + + atmel,min-sample-rate-hz: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: Minimum sampling rate, it depends on SoC. + + atmel,max-sample-rate-hz: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: Maximum sampling rate, it depends on SoC. + + atmel,startup-time-ms: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: Startup time expressed in ms, it depends on SoC. + + atmel,trigger-edge-type: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + One of possible edge types for the ADTRG hardware trigger pin. + When the specific edge type is detected, the conversion will + start. Should be one of IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING + or IRQ_TYPE_EDGE_BOTH. + enum: [1, 2, 3] + + dmas: + maxItems: 1 + + dma-names: + const: rx + + "#io-channel-cells": + const: 1 + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + - vddana-supply + - atmel,min-sample-rate-hz + - atmel,max-sample-rate-hz + - atmel,startup-time-ms + - atmel,trigger-edge-type + +examples: + - | + #include + #include + soc { + #address-cells = <1>; + #size-cells = <1>; + + adc@fc030000 { + compatible = "atmel,sama5d2-adc"; + reg = <0xfc030000 0x100>; + interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&adc_clk>; + clock-names = "adc_clk"; + atmel,min-sample-rate-hz = <200000>; + atmel,max-sample-rate-hz = <20000000>; + atmel,startup-time-ms = <4>; + vddana-supply = <&vdd_3v3_lp_reg>; + vref-supply = <&vdd_3v3_lp_reg>; + atmel,trigger-edge-type = ; + dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; + dma-names = "rx"; + #io-channel-cells = <1>; + }; + }; +... -- 2.28.0