From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 266CCC2D0A3 for ; Tue, 3 Nov 2020 14:54:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BD33620757 for ; Tue, 3 Nov 2020 14:54:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BD33620757 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E6486ECB6; Tue, 3 Nov 2020 14:54:26 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 659566ECC4 for ; Tue, 3 Nov 2020 14:54:25 +0000 (UTC) IronPort-SDR: zp4sh/vf/KMCRGDRPfOb1vojaaIygoFeq/BWopnMqWdMMC1QOKpPpCuoQXKz4x4kN4cuYrSjZX rWIrwPMav10g== X-IronPort-AV: E=McAfee;i="6000,8403,9793"; a="230690829" X-IronPort-AV: E=Sophos;i="5.77,448,1596524400"; d="scan'208";a="230690829" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2020 06:54:25 -0800 IronPort-SDR: zqMj44Sm34IOhRBgoxDIokld8cMBT+LKt/IfDBHflwNOeWk7FFr4GlOchruge6EcsMySEvuHXF GqAXdWqEGB5Q== X-IronPort-AV: E=Sophos;i="5.77,448,1596524400"; d="scan'208";a="470824335" Received: from linux-desktop.iind.intel.com ([10.223.34.173]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2020 06:54:23 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Tue, 3 Nov 2020 20:58:29 +0530 Message-Id: <20201103152834.12727-8-uma.shankar@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201103152834.12727-1-uma.shankar@intel.com> References: <20201103152834.12727-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v9 07/12] drm/i915/display: Enable HDR for Parade based lspcon X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vipin Anand Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enable HDR for LSPCON based on Parade along with MCA. v2: Added a helper for status reg as suggested by Ville. Signed-off-by: Uma Shankar Signed-off-by: Vipin Anand --- drivers/gpu/drm/i915/display/intel_lspcon.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index 19831f5e51bf..0cd3e0853cbf 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -36,6 +36,7 @@ #define LSPCON_VENDOR_MCA_OUI 0x0060AD #define DPCD_MCA_LSPCON_HDR_STATUS 0x70003 +#define DPCD_PARADE_LSPCON_HDR_STATUS 0x00511 /* AUX addresses to write MCA AVI IF */ #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0 @@ -106,21 +107,27 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon) return true; } +static u32 get_hdr_status_reg(struct intel_lspcon *lspcon) +{ + if (lspcon->vendor == LSPCON_VENDOR_MCA) + return DPCD_MCA_LSPCON_HDR_STATUS; + else + return DPCD_PARADE_LSPCON_HDR_STATUS; +} + void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon) { struct intel_digital_port *dig_port = container_of(lspcon, struct intel_digital_port, lspcon); struct drm_device *dev = dig_port->base.base.dev; struct intel_dp *dp = lspcon_to_intel_dp(lspcon); + u32 lspcon_hdr_status_reg; u8 hdr_caps; int ret; - /* Enable HDR for MCA based LSPCON devices */ - if (lspcon->vendor == LSPCON_VENDOR_MCA) - ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS, - &hdr_caps, 1); - else - return; + lspcon_hdr_status_reg = get_hdr_status_reg(lspcon); + ret = drm_dp_dpcd_read(&dp->aux, lspcon_hdr_status_reg, + &hdr_caps, 1); if (ret < 0) { drm_dbg_kms(dev, "hdr capability detection failed\n"); -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx