[PATCH 2] Register read and writes tracing

[PATCH 2] Register read and writes tracing

[Prasad Sodagudi]

This patch series adds register read/write event tracing
support. Qualcomm team tried upstreaming the register
trace buffer solution - [1] with pstore and dynamic debug
feature but that patch series didn't merge. I have followed
Steve suggestion from -[2] and used tracepoint_enabled() API.

[1] - https://patchwork.kernel.org/project/linux-arm-msm/cover/cover.1536430404.git.saiprakash.ranjan@codeaurora.org/
[2] - https://lore.kernel.org/lkml/20200928105501.7e29df65@oasis.local.home/ 

Qualcomm teams uses these logs for debugging various issues
in the product life cycle and hopping that this logging
would help other silicon vendors as this is generic approach.

v1 -> v2:
- Removed _no_log variant
- tracepoint_enabled api is used.
- Added depends on ARM64


Prasad Sodagudi (1):
  tracing: Add register read and write tracing support

 arch/arm64/include/asm/io.h    |  9 ++++++++
 arch/arm64/kernel/image-vars.h |  8 +++++++
 include/linux/iorw.h           | 38 +++++++++++++++++++++++++++++++
 include/trace/events/rwio.h    | 51 ++++++++++++++++++++++++++++++++++++++++++
 kernel/trace/Kconfig           | 11 +++++++++
 kernel/trace/Makefile          |  1 +
 kernel/trace/trace_readwrite.c | 31 +++++++++++++++++++++++++
 7 files changed, 149 insertions(+)
 create mode 100644 include/linux/iorw.h
 create mode 100644 include/trace/events/rwio.h
 create mode 100644 kernel/trace/trace_readwrite.c

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 2] Register read and writes tracing

[Prasad Sodagudi]

This patch series adds register read/write event tracing
support. Qualcomm team tried upstreaming the register
trace buffer solution - [1] with pstore and dynamic debug
feature but that patch series didn't merge. I have followed
Steve suggestion from -[2] and used tracepoint_enabled() API.

[1] - https://patchwork.kernel.org/project/linux-arm-msm/cover/cover.1536430404.git.saiprakash.ranjan@codeaurora.org/
[2] - https://lore.kernel.org/lkml/20200928105501.7e29df65@oasis.local.home/ 

Qualcomm teams uses these logs for debugging various issues
in the product life cycle and hopping that this logging
would help other silicon vendors as this is generic approach.

v1 -> v2:
- Removed _no_log variant
- tracepoint_enabled api is used.
- Added depends on ARM64


Prasad Sodagudi (1):
  tracing: Add register read and write tracing support

 arch/arm64/include/asm/io.h    |  9 ++++++++
 arch/arm64/kernel/image-vars.h |  8 +++++++
 include/linux/iorw.h           | 38 +++++++++++++++++++++++++++++++
 include/trace/events/rwio.h    | 51 ++++++++++++++++++++++++++++++++++++++++++
 kernel/trace/Kconfig           | 11 +++++++++
 kernel/trace/Makefile          |  1 +
 kernel/trace/trace_readwrite.c | 31 +++++++++++++++++++++++++
 7 files changed, 149 insertions(+)
 create mode 100644 include/linux/iorw.h
 create mode 100644 include/trace/events/rwio.h
 create mode 100644 kernel/trace/trace_readwrite.c

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2] tracing: Add register read and write tracing support

[Prasad Sodagudi]

Add register read/write operations tracing support.
ftrace events helps to trace register read and write
location details of memory mapped IO registers.
These trace logs helps to debug un clocked access
of peripherals.

Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
---
 arch/arm64/include/asm/io.h    |  9 ++++++++
 arch/arm64/kernel/image-vars.h |  8 +++++++
 include/linux/iorw.h           | 38 +++++++++++++++++++++++++++++++
 include/trace/events/rwio.h    | 51 ++++++++++++++++++++++++++++++++++++++++++
 kernel/trace/Kconfig           | 11 +++++++++
 kernel/trace/Makefile          |  1 +
 kernel/trace/trace_readwrite.c | 31 +++++++++++++++++++++++++
 7 files changed, 149 insertions(+)
 create mode 100644 include/linux/iorw.h
 create mode 100644 include/trace/events/rwio.h
 create mode 100644 kernel/trace/trace_readwrite.c

diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index fd172c4..bcfc65c 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -9,6 +9,7 @@
 #define __ASM_IO_H
 
 #include <linux/types.h>
+#include <linux/iorw.h>
 #include <linux/pgtable.h>
 
 #include <asm/byteorder.h>
@@ -24,24 +25,28 @@
 #define __raw_writeb __raw_writeb
 static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
 #define __raw_writew __raw_writew
 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("strh %w0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
 #define __raw_writel __raw_writel
 static __always_inline void __raw_writel(u32 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
 #define __raw_writeq __raw_writeq
 static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("str %x0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
@@ -49,6 +54,7 @@ static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
 static inline u8 __raw_readb(const volatile void __iomem *addr)
 {
 	u8 val;
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldrb %w0, [%1]",
 				 "ldarb %w0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
@@ -61,6 +67,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
 {
 	u16 val;
 
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldrh %w0, [%1]",
 				 "ldarh %w0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
@@ -72,6 +79,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
 static __always_inline u32 __raw_readl(const volatile void __iomem *addr)
 {
 	u32 val;
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldr %w0, [%1]",
 				 "ldar %w0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
@@ -83,6 +91,7 @@ static __always_inline u32 __raw_readl(const volatile void __iomem *addr)
 static inline u64 __raw_readq(const volatile void __iomem *addr)
 {
 	u64 val;
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldr %0, [%1]",
 				 "ldar %0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h
index c615b28..6a70d91 100644
--- a/arch/arm64/kernel/image-vars.h
+++ b/arch/arm64/kernel/image-vars.h
@@ -103,6 +103,14 @@ KVM_NVHE_ALIAS(gic_nonsecure_priorities);
 KVM_NVHE_ALIAS(__start___kvm_ex_table);
 KVM_NVHE_ALIAS(__stop___kvm_ex_table);
 
+/* raw_read/write logging */
+#if IS_ENABLED(CONFIG_TRACE_RW)
+KVM_NVHE_ALIAS(__log_write_io);
+KVM_NVHE_ALIAS(__log_read_io);
+KVM_NVHE_ALIAS(__tracepoint_rwio_read);
+KVM_NVHE_ALIAS(__tracepoint_rwio_write);
+#endif
+
 #endif /* CONFIG_KVM */
 
 #endif /* __ARM64_KERNEL_IMAGE_VARS_H */
diff --git a/include/linux/iorw.h b/include/linux/iorw.h
new file mode 100644
index 0000000..6b571b4
--- /dev/null
+++ b/include/linux/iorw.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *
+ */
+#ifndef __LOG_IORW_H__
+#define __LOG_IORW_H__
+
+#include <linux/types.h>
+#include <linux/atomic.h>
+#include <linux/tracepoint-defs.h>
+
+#if IS_ENABLED(CONFIG_TRACE_RW)
+DECLARE_TRACEPOINT(rwio_write);
+DECLARE_TRACEPOINT(rwio_read);
+
+void __log_write_io(volatile void __iomem *addr);
+void __log_read_io(const volatile void __iomem *addr);
+
+#define log_write_io(addr)			\
+do {						\
+	if (tracepoint_enabled(rwio_write))	\
+		__log_write_io(addr);		\
+} while (0)
+
+#define log_read_io(addr)			\
+do {						\
+	if (tracepoint_enabled(rwio_read))	\
+		__log_read_io(addr);		\
+} while (0)
+
+#else
+static inline void log_write_io(volatile void __iomem *addr)
+{ }
+static inline void log_read_io(const volatile void __iomem *addr)
+{ }
+#endif /* CONFIG_TRACE_RW */
+
+#endif /* __LOG_IORW_H__  */
diff --git a/include/trace/events/rwio.h b/include/trace/events/rwio.h
new file mode 100644
index 0000000..b26bcaf
--- /dev/null
+++ b/include/trace/events/rwio.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM rwio
+
+#if !defined(_TRACE_RWIO_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_RWIO_H
+
+#include <linux/tracepoint.h>
+
+TRACE_EVENT(rwio_write,
+
+	TP_PROTO(unsigned long fn, volatile void __iomem *addr),
+
+	TP_ARGS(fn, addr),
+
+	TP_STRUCT__entry(
+		__field(u64, fn)
+		__field(u64, addr)
+	),
+
+	TP_fast_assign(
+		__entry->fn = fn;
+		__entry->addr = (u64)addr;
+	),
+
+	TP_printk("%pS write addr=%p\n", __entry->fn, __entry->addr)
+);
+
+TRACE_EVENT(rwio_read,
+
+	TP_PROTO(unsigned long fn, const volatile void __iomem *addr),
+
+	TP_ARGS(fn, addr),
+
+	TP_STRUCT__entry(
+		__field(u64, fn)
+		__field(u64, addr)
+	),
+
+	TP_fast_assign(
+		__entry->fn = fn;
+		__entry->addr = (u64)addr;
+	),
+
+	TP_printk("%pS read addr=%p\n", __entry->fn, __entry->addr)
+);
+
+#endif /* _TRACE_PREEMPTIRQ_H */
+
+#include <trace/define_trace.h>
diff --git a/kernel/trace/Kconfig b/kernel/trace/Kconfig
index a4020c0..f0408f9 100644
--- a/kernel/trace/Kconfig
+++ b/kernel/trace/Kconfig
@@ -81,6 +81,17 @@ config RING_BUFFER_ALLOW_SWAP
 	 Allow the use of ring_buffer_swap_cpu.
 	 Adds a very slight overhead to tracing when enabled.
 
+config TRACE_RW
+	bool "Register read/write tracing"
+	select TRACING
+	depends on ARM64
+	help
+	  Create tracepoints for IO read/write operations, so that
+	  modules can register hooks to use them.
+
+	  Disable this option, when there is support from corresponding
+	  architecture.
+
 config PREEMPTIRQ_TRACEPOINTS
 	bool
 	depends on TRACE_PREEMPT_TOGGLE || TRACE_IRQFLAGS
diff --git a/kernel/trace/Makefile b/kernel/trace/Makefile
index e153be3..69edfe50 100644
--- a/kernel/trace/Makefile
+++ b/kernel/trace/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_DYNAMIC_EVENTS) += trace_dynevent.o
 obj-$(CONFIG_PROBE_EVENTS) += trace_probe.o
 obj-$(CONFIG_UPROBE_EVENTS) += trace_uprobe.o
 obj-$(CONFIG_BOOTTIME_TRACING) += trace_boot.o
+obj-$(CONFIG_TRACE_RW) += trace_readwrite.o
 
 obj-$(CONFIG_TRACEPOINT_BENCHMARK) += trace_benchmark.o
 
diff --git a/kernel/trace/trace_readwrite.c b/kernel/trace/trace_readwrite.c
new file mode 100644
index 0000000..d107134
--- /dev/null
+++ b/kernel/trace/trace_readwrite.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Register read and write tracepoints
+ *
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#include <linux/kallsyms.h>
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/ftrace.h>
+#include <linux/iorw.h>
+
+#define CREATE_TRACE_POINTS
+#include <trace/events/rwio.h>
+
+#ifdef CONFIG_TRACEPOINTS
+void __log_write_io(volatile void __iomem *addr)
+{
+	trace_rwio_write(CALLER_ADDR0, addr);
+}
+EXPORT_SYMBOL_GPL(__log_write_io);
+EXPORT_TRACEPOINT_SYMBOL_GPL(rwio_write);
+
+void __log_read_io(const volatile void __iomem *addr)
+{
+	trace_rwio_read(CALLER_ADDR0, addr);
+}
+EXPORT_SYMBOL_GPL(__log_read_io);
+EXPORT_TRACEPOINT_SYMBOL_GPL(rwio_read);
+#endif
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH v2] tracing: Add register read and write tracing support

[Prasad Sodagudi]

Add register read/write operations tracing support.
ftrace events helps to trace register read and write
location details of memory mapped IO registers.
These trace logs helps to debug un clocked access
of peripherals.

Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
---
 arch/arm64/include/asm/io.h    |  9 ++++++++
 arch/arm64/kernel/image-vars.h |  8 +++++++
 include/linux/iorw.h           | 38 +++++++++++++++++++++++++++++++
 include/trace/events/rwio.h    | 51 ++++++++++++++++++++++++++++++++++++++++++
 kernel/trace/Kconfig           | 11 +++++++++
 kernel/trace/Makefile          |  1 +
 kernel/trace/trace_readwrite.c | 31 +++++++++++++++++++++++++
 7 files changed, 149 insertions(+)
 create mode 100644 include/linux/iorw.h
 create mode 100644 include/trace/events/rwio.h
 create mode 100644 kernel/trace/trace_readwrite.c

diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index fd172c4..bcfc65c 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -9,6 +9,7 @@
 #define __ASM_IO_H
 
 #include <linux/types.h>
+#include <linux/iorw.h>
 #include <linux/pgtable.h>
 
 #include <asm/byteorder.h>
@@ -24,24 +25,28 @@
 #define __raw_writeb __raw_writeb
 static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
 #define __raw_writew __raw_writew
 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("strh %w0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
 #define __raw_writel __raw_writel
 static __always_inline void __raw_writel(u32 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
 #define __raw_writeq __raw_writeq
 static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
 {
+	log_write_io(addr);
 	asm volatile("str %x0, [%1]" : : "rZ" (val), "r" (addr));
 }
 
@@ -49,6 +54,7 @@ static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
 static inline u8 __raw_readb(const volatile void __iomem *addr)
 {
 	u8 val;
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldrb %w0, [%1]",
 				 "ldarb %w0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
@@ -61,6 +67,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
 {
 	u16 val;
 
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldrh %w0, [%1]",
 				 "ldarh %w0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
@@ -72,6 +79,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
 static __always_inline u32 __raw_readl(const volatile void __iomem *addr)
 {
 	u32 val;
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldr %w0, [%1]",
 				 "ldar %w0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
@@ -83,6 +91,7 @@ static __always_inline u32 __raw_readl(const volatile void __iomem *addr)
 static inline u64 __raw_readq(const volatile void __iomem *addr)
 {
 	u64 val;
+	log_read_io(addr);
 	asm volatile(ALTERNATIVE("ldr %0, [%1]",
 				 "ldar %0, [%1]",
 				 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h
index c615b28..6a70d91 100644
--- a/arch/arm64/kernel/image-vars.h
+++ b/arch/arm64/kernel/image-vars.h
@@ -103,6 +103,14 @@ KVM_NVHE_ALIAS(gic_nonsecure_priorities);
 KVM_NVHE_ALIAS(__start___kvm_ex_table);
 KVM_NVHE_ALIAS(__stop___kvm_ex_table);
 
+/* raw_read/write logging */
+#if IS_ENABLED(CONFIG_TRACE_RW)
+KVM_NVHE_ALIAS(__log_write_io);
+KVM_NVHE_ALIAS(__log_read_io);
+KVM_NVHE_ALIAS(__tracepoint_rwio_read);
+KVM_NVHE_ALIAS(__tracepoint_rwio_write);
+#endif
+
 #endif /* CONFIG_KVM */
 
 #endif /* __ARM64_KERNEL_IMAGE_VARS_H */
diff --git a/include/linux/iorw.h b/include/linux/iorw.h
new file mode 100644
index 0000000..6b571b4
--- /dev/null
+++ b/include/linux/iorw.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *
+ */
+#ifndef __LOG_IORW_H__
+#define __LOG_IORW_H__
+
+#include <linux/types.h>
+#include <linux/atomic.h>
+#include <linux/tracepoint-defs.h>
+
+#if IS_ENABLED(CONFIG_TRACE_RW)
+DECLARE_TRACEPOINT(rwio_write);
+DECLARE_TRACEPOINT(rwio_read);
+
+void __log_write_io(volatile void __iomem *addr);
+void __log_read_io(const volatile void __iomem *addr);
+
+#define log_write_io(addr)			\
+do {						\
+	if (tracepoint_enabled(rwio_write))	\
+		__log_write_io(addr);		\
+} while (0)
+
+#define log_read_io(addr)			\
+do {						\
+	if (tracepoint_enabled(rwio_read))	\
+		__log_read_io(addr);		\
+} while (0)
+
+#else
+static inline void log_write_io(volatile void __iomem *addr)
+{ }
+static inline void log_read_io(const volatile void __iomem *addr)
+{ }
+#endif /* CONFIG_TRACE_RW */
+
+#endif /* __LOG_IORW_H__  */
diff --git a/include/trace/events/rwio.h b/include/trace/events/rwio.h
new file mode 100644
index 0000000..b26bcaf
--- /dev/null
+++ b/include/trace/events/rwio.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM rwio
+
+#if !defined(_TRACE_RWIO_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_RWIO_H
+
+#include <linux/tracepoint.h>
+
+TRACE_EVENT(rwio_write,
+
+	TP_PROTO(unsigned long fn, volatile void __iomem *addr),
+
+	TP_ARGS(fn, addr),
+
+	TP_STRUCT__entry(
+		__field(u64, fn)
+		__field(u64, addr)
+	),
+
+	TP_fast_assign(
+		__entry->fn = fn;
+		__entry->addr = (u64)addr;
+	),
+
+	TP_printk("%pS write addr=%p\n", __entry->fn, __entry->addr)
+);
+
+TRACE_EVENT(rwio_read,
+
+	TP_PROTO(unsigned long fn, const volatile void __iomem *addr),
+
+	TP_ARGS(fn, addr),
+
+	TP_STRUCT__entry(
+		__field(u64, fn)
+		__field(u64, addr)
+	),
+
+	TP_fast_assign(
+		__entry->fn = fn;
+		__entry->addr = (u64)addr;
+	),
+
+	TP_printk("%pS read addr=%p\n", __entry->fn, __entry->addr)
+);
+
+#endif /* _TRACE_PREEMPTIRQ_H */
+
+#include <trace/define_trace.h>
diff --git a/kernel/trace/Kconfig b/kernel/trace/Kconfig
index a4020c0..f0408f9 100644
--- a/kernel/trace/Kconfig
+++ b/kernel/trace/Kconfig
@@ -81,6 +81,17 @@ config RING_BUFFER_ALLOW_SWAP
 	 Allow the use of ring_buffer_swap_cpu.
 	 Adds a very slight overhead to tracing when enabled.
 
+config TRACE_RW
+	bool "Register read/write tracing"
+	select TRACING
+	depends on ARM64
+	help
+	  Create tracepoints for IO read/write operations, so that
+	  modules can register hooks to use them.
+
+	  Disable this option, when there is support from corresponding
+	  architecture.
+
 config PREEMPTIRQ_TRACEPOINTS
 	bool
 	depends on TRACE_PREEMPT_TOGGLE || TRACE_IRQFLAGS
diff --git a/kernel/trace/Makefile b/kernel/trace/Makefile
index e153be3..69edfe50 100644
--- a/kernel/trace/Makefile
+++ b/kernel/trace/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_DYNAMIC_EVENTS) += trace_dynevent.o
 obj-$(CONFIG_PROBE_EVENTS) += trace_probe.o
 obj-$(CONFIG_UPROBE_EVENTS) += trace_uprobe.o
 obj-$(CONFIG_BOOTTIME_TRACING) += trace_boot.o
+obj-$(CONFIG_TRACE_RW) += trace_readwrite.o
 
 obj-$(CONFIG_TRACEPOINT_BENCHMARK) += trace_benchmark.o
 
diff --git a/kernel/trace/trace_readwrite.c b/kernel/trace/trace_readwrite.c
new file mode 100644
index 0000000..d107134
--- /dev/null
+++ b/kernel/trace/trace_readwrite.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Register read and write tracepoints
+ *
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#include <linux/kallsyms.h>
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/ftrace.h>
+#include <linux/iorw.h>
+
+#define CREATE_TRACE_POINTS
+#include <trace/events/rwio.h>
+
+#ifdef CONFIG_TRACEPOINTS
+void __log_write_io(volatile void __iomem *addr)
+{
+	trace_rwio_write(CALLER_ADDR0, addr);
+}
+EXPORT_SYMBOL_GPL(__log_write_io);
+EXPORT_TRACEPOINT_SYMBOL_GPL(rwio_write);
+
+void __log_read_io(const volatile void __iomem *addr)
+{
+	trace_rwio_read(CALLER_ADDR0, addr);
+}
+EXPORT_SYMBOL_GPL(__log_read_io);
+EXPORT_TRACEPOINT_SYMBOL_GPL(rwio_read);
+#endif
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project


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Re: [PATCH 2] Register read and writes tracing

[Florian Fainelli]

On 11/5/2020 6:56 PM, Prasad Sodagudi wrote:
> This patch series adds register read/write event tracing
> support. Qualcomm team tried upstreaming the register
> trace buffer solution - [1] with pstore and dynamic debug
> feature but that patch series didn't merge. I have followed
> Steve suggestion from -[2] and used tracepoint_enabled() API.
> 
> [1] - https://patchwork.kernel.org/project/linux-arm-msm/cover/cover.1536430404.git.saiprakash.ranjan@codeaurora.org/
> [2] - https://lore.kernel.org/lkml/20200928105501.7e29df65@oasis.local.home/ 
> 
> Qualcomm teams uses these logs for debugging various issues
> in the product life cycle and hopping that this logging
> would help other silicon vendors as this is generic approach.

There is not anything arm64 specific here other than where you have
hooked into the low-level I/O accessors, you could consider adding this
as a generic facility to other architectures as well.

Also, have you looked at making mmiotrace less x86 specific and more
generic?
-- 
Florian

Re: [PATCH 2] Register read and writes tracing

[Florian Fainelli]

On 11/5/2020 6:56 PM, Prasad Sodagudi wrote:
> This patch series adds register read/write event tracing
> support. Qualcomm team tried upstreaming the register
> trace buffer solution - [1] with pstore and dynamic debug
> feature but that patch series didn't merge. I have followed
> Steve suggestion from -[2] and used tracepoint_enabled() API.
> 
> [1] - https://patchwork.kernel.org/project/linux-arm-msm/cover/cover.1536430404.git.saiprakash.ranjan@codeaurora.org/
> [2] - https://lore.kernel.org/lkml/20200928105501.7e29df65@oasis.local.home/ 
> 
> Qualcomm teams uses these logs for debugging various issues
> in the product life cycle and hopping that this logging
> would help other silicon vendors as this is generic approach.

There is not anything arm64 specific here other than where you have
hooked into the low-level I/O accessors, you could consider adding this
as a generic facility to other architectures as well.

Also, have you looked at making mmiotrace less x86 specific and more
generic?
-- 
Florian

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Re: [PATCH v2] tracing: Add register read and write tracing support

[Greg KH]

On Thu, Nov 05, 2020 at 06:56:26PM -0800, Prasad Sodagudi wrote:
> Add register read/write operations tracing support.
> ftrace events helps to trace register read and write
> location details of memory mapped IO registers.

This sentance does not parse for me, can you please rework it?

> These trace logs helps to debug un clocked access
> of peripherals.

"un clocked"?  What does that mean?

And you do have 72 columns to fill, please use it :)

> 
> Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
> ---
>  arch/arm64/include/asm/io.h    |  9 ++++++++
>  arch/arm64/kernel/image-vars.h |  8 +++++++

You are only adding it for arm64, why not add the generic support first,
and then add it for all "major" arches afterwards?


>  include/linux/iorw.h           | 38 +++++++++++++++++++++++++++++++
>  include/trace/events/rwio.h    | 51 ++++++++++++++++++++++++++++++++++++++++++
>  kernel/trace/Kconfig           | 11 +++++++++
>  kernel/trace/Makefile          |  1 +
>  kernel/trace/trace_readwrite.c | 31 +++++++++++++++++++++++++
>  7 files changed, 149 insertions(+)
>  create mode 100644 include/linux/iorw.h
>  create mode 100644 include/trace/events/rwio.h
>  create mode 100644 kernel/trace/trace_readwrite.c
> 
> diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
> index fd172c4..bcfc65c 100644
> --- a/arch/arm64/include/asm/io.h
> +++ b/arch/arm64/include/asm/io.h
> @@ -9,6 +9,7 @@
>  #define __ASM_IO_H
>  
>  #include <linux/types.h>
> +#include <linux/iorw.h>
>  #include <linux/pgtable.h>
>  
>  #include <asm/byteorder.h>
> @@ -24,24 +25,28 @@
>  #define __raw_writeb __raw_writeb
>  static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
>  {
> +	log_write_io(addr);
>  	asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr));

Why are you not logging the value here, and everywhere else?  You need
to document why that is somewhere, as it's the most obvious question you
will get.

thanks,

greg k-h

Re: [PATCH v2] tracing: Add register read and write tracing support

[Greg KH]

On Thu, Nov 05, 2020 at 06:56:26PM -0800, Prasad Sodagudi wrote:
> Add register read/write operations tracing support.
> ftrace events helps to trace register read and write
> location details of memory mapped IO registers.

This sentance does not parse for me, can you please rework it?

> These trace logs helps to debug un clocked access
> of peripherals.

"un clocked"?  What does that mean?

And you do have 72 columns to fill, please use it :)

> 
> Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
> ---
>  arch/arm64/include/asm/io.h    |  9 ++++++++
>  arch/arm64/kernel/image-vars.h |  8 +++++++

You are only adding it for arm64, why not add the generic support first,
and then add it for all "major" arches afterwards?


>  include/linux/iorw.h           | 38 +++++++++++++++++++++++++++++++
>  include/trace/events/rwio.h    | 51 ++++++++++++++++++++++++++++++++++++++++++
>  kernel/trace/Kconfig           | 11 +++++++++
>  kernel/trace/Makefile          |  1 +
>  kernel/trace/trace_readwrite.c | 31 +++++++++++++++++++++++++
>  7 files changed, 149 insertions(+)
>  create mode 100644 include/linux/iorw.h
>  create mode 100644 include/trace/events/rwio.h
>  create mode 100644 kernel/trace/trace_readwrite.c
> 
> diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
> index fd172c4..bcfc65c 100644
> --- a/arch/arm64/include/asm/io.h
> +++ b/arch/arm64/include/asm/io.h
> @@ -9,6 +9,7 @@
>  #define __ASM_IO_H
>  
>  #include <linux/types.h>
> +#include <linux/iorw.h>
>  #include <linux/pgtable.h>
>  
>  #include <asm/byteorder.h>
> @@ -24,24 +25,28 @@
>  #define __raw_writeb __raw_writeb
>  static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
>  {
> +	log_write_io(addr);
>  	asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr));

Why are you not logging the value here, and everywhere else?  You need
to document why that is somewhere, as it's the most obvious question you
will get.

thanks,

greg k-h

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Re: [PATCH v2] tracing: Add register read and write tracing support

[Will Deacon]

On Fri, Nov 06, 2020 at 07:49:29AM +0100, Greg KH wrote:
> On Thu, Nov 05, 2020 at 06:56:26PM -0800, Prasad Sodagudi wrote:
> > Add register read/write operations tracing support.
> > ftrace events helps to trace register read and write
> > location details of memory mapped IO registers.
> 
> This sentance does not parse for me, can you please rework it?
> 
> > These trace logs helps to debug un clocked access
> > of peripherals.
> 
> "un clocked"?  What does that mean?
> 
> And you do have 72 columns to fill, please use it :)
> 
> > 
> > Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
> > ---
> >  arch/arm64/include/asm/io.h    |  9 ++++++++
> >  arch/arm64/kernel/image-vars.h |  8 +++++++
> 
> You are only adding it for arm64, why not add the generic support first,
> and then add it for all "major" arches afterwards?

Yeah, or just hook the higher-level accessors rather than the arch-specific
bowels. Less work for more coverage that way!

Will

Re: [PATCH v2] tracing: Add register read and write tracing support

[Will Deacon]

On Fri, Nov 06, 2020 at 07:49:29AM +0100, Greg KH wrote:
> On Thu, Nov 05, 2020 at 06:56:26PM -0800, Prasad Sodagudi wrote:
> > Add register read/write operations tracing support.
> > ftrace events helps to trace register read and write
> > location details of memory mapped IO registers.
> 
> This sentance does not parse for me, can you please rework it?
> 
> > These trace logs helps to debug un clocked access
> > of peripherals.
> 
> "un clocked"?  What does that mean?
> 
> And you do have 72 columns to fill, please use it :)
> 
> > 
> > Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
> > ---
> >  arch/arm64/include/asm/io.h    |  9 ++++++++
> >  arch/arm64/kernel/image-vars.h |  8 +++++++
> 
> You are only adding it for arm64, why not add the generic support first,
> and then add it for all "major" arches afterwards?

Yeah, or just hook the higher-level accessors rather than the arch-specific
bowels. Less work for more coverage that way!

Will

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