Hi AKASHI, [FYI, it's a private test report for your RFC patch.] [auto build test WARNING on linus/master] [also build test WARNING on v5.10-rc2] [cannot apply to v3.1 next-20201105] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/AKASHI-Takahiro/Add-support-UHS-II-for-GL9755/20201106-103058 base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 521b619acdc8f1f5acdac15b84f81fd9515b2aff config: m68k-randconfig-s032-20201105 (attached as .config) compiler: m68k-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-76-gf680124b-dirty # https://github.com/0day-ci/linux/commit/e0a16832f2735443cd9a6977706160aef7271995 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review AKASHI-Takahiro/Add-support-UHS-II-for-GL9755/20201106-103058 git checkout e0a16832f2735443cd9a6977706160aef7271995 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=m68k If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot "sparse warnings: (new ones prefixed by >>)" >> drivers/mmc/core/uhs2.c:414:20: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ >> drivers/mmc/core/uhs2.c:414:20: sparse: expected unsigned int >> drivers/mmc/core/uhs2.c:414:20: sparse: got restricted __be32 [usertype] drivers/mmc/core/uhs2.c:415:20: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ drivers/mmc/core/uhs2.c:415:20: sparse: expected unsigned int drivers/mmc/core/uhs2.c:415:20: sparse: got restricted __be32 [usertype] drivers/mmc/core/uhs2.c:503:28: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ drivers/mmc/core/uhs2.c:503:28: sparse: expected unsigned int drivers/mmc/core/uhs2.c:503:28: sparse: got restricted __be32 [usertype] drivers/mmc/core/uhs2.c:504:28: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ drivers/mmc/core/uhs2.c:504:28: sparse: expected unsigned int drivers/mmc/core/uhs2.c:504:28: sparse: got restricted __be32 [usertype] drivers/mmc/core/uhs2.c:580:20: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ drivers/mmc/core/uhs2.c:580:20: sparse: expected unsigned int drivers/mmc/core/uhs2.c:580:20: sparse: got restricted __be32 [usertype] drivers/mmc/core/uhs2.c:581:20: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ drivers/mmc/core/uhs2.c:581:20: sparse: expected unsigned int drivers/mmc/core/uhs2.c:581:20: sparse: got restricted __be32 [usertype] drivers/mmc/core/uhs2.c:604:20: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ drivers/mmc/core/uhs2.c:604:20: sparse: expected unsigned int drivers/mmc/core/uhs2.c:604:20: sparse: got restricted __be32 [usertype] drivers/mmc/core/uhs2.c:605:20: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int @@ got restricted __be32 [usertype] @@ drivers/mmc/core/uhs2.c:605:20: sparse: expected unsigned int drivers/mmc/core/uhs2.c:605:20: sparse: got restricted __be32 [usertype] vim +414 drivers/mmc/core/uhs2.c 364 365 static int uhs2_config_write(struct mmc_host *host) 366 { 367 struct mmc_command cmd = {0}; 368 struct uhs2_command uhs2_cmd = {}; 369 u16 header = 0, arg = 0; 370 u32 nTry; 371 u32 payload[2]; 372 u8 nMinDataGap; 373 u8 plen; 374 int err; 375 u8 resp[5] = {0}; 376 u8 resp_len = 5; 377 /* 378 * must long enough for RECV_SW_DIR == 2; 379 * need lss_dir at least 4 for GL9755 device 380 * max compitable gLssDir = 0 381 */ 382 u32 gLssDir = 0; 383 384 DBG("SET_COMMON_CFG: write Generic Settings.\n"); 385 header = UHS2_NATIVE_PACKET | 386 UHS2_PACKET_TYPE_CCMD | host->uhs2_dev_prop.node_id; 387 arg = ((UHS2_DEV_CONFIG_GEN_SET & 0xFF) << 8) | 388 UHS2_NATIVE_CMD_WRITE | 389 UHS2_NATIVE_CMD_PLEN_8B | 390 (UHS2_DEV_CONFIG_GEN_SET >> 8); 391 392 if (host->uhs2_dev_prop.n_lanes == UHS2_DEV_CONFIG_2L_HD_FD && 393 host->uhs2_caps.n_lanes == UHS2_DEV_CONFIG_2L_HD_FD) { 394 /* Support HD */ 395 DBG("Both Host and device support 2L-HD.\n"); 396 host->flags |= MMC_UHS2_2L_HD; 397 host->uhs2_caps.n_lanes_set = UHS2_DEV_CONFIG_GEN_SET_2L_FD_HD; 398 host->uhs2_dev_prop.n_lanes_set = 399 UHS2_DEV_CONFIG_GEN_SET_2L_FD_HD; 400 nMinDataGap = 1; 401 } else { 402 /* Only support 2L-FD so far */ 403 host->flags &= ~MMC_UHS2_2L_HD; 404 host->uhs2_caps.n_lanes_set = UHS2_DEV_CONFIG_GEN_SET_2L_FD_HD; 405 host->uhs2_dev_prop.n_lanes_set = 406 UHS2_DEV_CONFIG_GEN_SET_2L_FD_HD; 407 nMinDataGap = 3; 408 } 409 410 plen = 2; 411 payload[0] = host->uhs2_dev_prop.n_lanes_set << 412 UHS2_DEV_CONFIG_N_LANES_POS; 413 payload[1] = 0; > 414 payload[0] = cpu_to_be32(payload[0]); 415 payload[1] = cpu_to_be32(payload[1]); 416 417 DBG("Begin SET_COMMON_CFG, header=0x%x, arg=0x%x\n", header, arg); 418 DBG("UHS2 write Generic Settings %08x %08x\n", 419 payload[0], payload[1]); 420 DBG("flags=%08x dev_prop.n_lanes_set=%x host_caps.n_lanes_set=%x\n", 421 host->flags, 422 host->uhs2_dev_prop.n_lanes_set, 423 host->uhs2_caps.n_lanes_set); 424 425 /* 426 * There is no payload because per spec, there should be 427 * no payload field for read CCMD. 428 * Plen is set in arg. Per spec, plen for read CCMD 429 * represents the len of read data which is assigned in payload 430 * of following RES (p136). 431 */ 432 uhs2_cmd_assemble(&cmd, &uhs2_cmd, header, arg, payload, plen, NULL, 0); 433 434 err = mmc_wait_for_cmd(host, &cmd, 0); 435 if (err) { 436 pr_err("%s: %s: UHS2 CMD send fail, err= 0x%x!\n", 437 mmc_hostname(host), __func__, err); 438 return -EIO; 439 } 440 441 DBG("SET_COMMON_CFG: PHY Settings.\n"); 442 arg = ((UHS2_DEV_CONFIG_PHY_SET & 0xFF) << 8) | 443 UHS2_NATIVE_CMD_WRITE | 444 UHS2_NATIVE_CMD_PLEN_8B | 445 (UHS2_DEV_CONFIG_PHY_SET >> 8); 446 447 for (nTry = 0; nTry < 2; nTry++) { 448 plen = 2; 449 450 if (host->uhs2_caps.speed_range == 451 UHS2_DEV_CONFIG_PHY_SET_SPEED_B) { 452 host->flags |= MMC_UHS2_SPEED_B; 453 host->uhs2_dev_prop.speed_range_set = 454 UHS2_DEV_CONFIG_PHY_SET_SPEED_B; 455 DBG("set dev_prop.speed_range_set to SPEED_B\n"); 456 } else { 457 host->uhs2_dev_prop.speed_range_set = 458 UHS2_DEV_CONFIG_PHY_SET_SPEED_A; 459 host->flags &= ~MMC_UHS2_SPEED_B; 460 DBG("set dev_prop.speed_range_set to SPEED_A\n"); 461 } 462 463 payload[0] = host->uhs2_dev_prop.speed_range_set << 464 UHS2_DEV_CONFIG_PHY_SET_SPEED_POS; 465 466 host->uhs2_dev_prop.n_lss_sync_set = 467 (min(host->uhs2_dev_prop.n_lss_sync, 468 host->uhs2_caps.n_lss_sync) >> 2) & 469 UHS2_DEV_CONFIG_N_LSS_SYN_MASK; 470 host->uhs2_caps.n_lss_sync_set = 471 host->uhs2_dev_prop.n_lss_sync_set; 472 473 if (nTry) { 474 host->uhs2_dev_prop.n_lss_dir_set = 475 (max(host->uhs2_dev_prop.n_lss_dir, 476 host->uhs2_caps.n_lss_dir) >> 3) & 477 UHS2_DEV_CONFIG_N_LSS_DIR_MASK; 478 host->uhs2_caps.n_lss_dir_set = 479 host->uhs2_dev_prop.n_lss_dir_set; 480 payload[1] = (host->uhs2_dev_prop.n_lss_dir_set << 481 UHS2_DEV_CONFIG_N_LSS_DIR_POS) | 482 host->uhs2_dev_prop.n_lss_sync_set; 483 } else { 484 host->uhs2_caps.n_lss_dir_set = 485 (host->uhs2_dev_prop.n_lss_dir >> 3) & 486 UHS2_DEV_CONFIG_N_LSS_DIR_MASK; 487 host->uhs2_dev_prop.n_lss_dir_set = 488 ((host->uhs2_caps.n_lss_dir >> 3) + 1) & 489 UHS2_DEV_CONFIG_N_LSS_DIR_MASK; 490 } 491 492 if (!gLssDir) { 493 host->uhs2_dev_prop.n_lss_dir_set = 0; 494 } else { 495 host->uhs2_dev_prop.n_lss_dir_set = 496 max((u8)gLssDir, 497 host->uhs2_dev_prop.n_lss_dir_set); 498 } 499 500 payload[1] = (host->uhs2_dev_prop.n_lss_dir_set << 501 UHS2_DEV_CONFIG_N_LSS_DIR_POS) | 502 host->uhs2_dev_prop.n_lss_sync_set; 503 payload[0] = cpu_to_be32(payload[0]); 504 payload[1] = cpu_to_be32(payload[1]); 505 506 DBG("UHS2 SET PHY Settings %08x %08x\n", 507 payload[0], payload[1]); 508 DBG("host->flags=%08x dev_prop.speed_range_set=%x\n", 509 host->flags, 510 host->uhs2_dev_prop.speed_range_set); 511 DBG("dev_prop.n_lss_sync_set=%x host_caps.n_lss_sync_set=%x\n", 512 host->uhs2_dev_prop.n_lss_sync_set, 513 host->uhs2_caps.n_lss_sync_set); 514 DBG("dev_prop.n_lss_dir_set=%x host_caps.n_lss_dir_set=%x\n", 515 host->uhs2_dev_prop.n_lss_dir_set, 516 host->uhs2_caps.n_lss_dir_set); 517 518 DBG("Begin SET_COMMON_CFG header=0x%x arg=0x%x\n", 519 header, arg); 520 DBG("\t\tpayload[0]=0x%x payload[1]=0x%x\n", 521 payload[0], payload[1]); 522 523 resp_len = 4; 524 memset(resp, 0, sizeof(resp)); 525 526 uhs2_cmd_assemble(&cmd, &uhs2_cmd, header, arg, 527 payload, plen, resp, resp_len); 528 529 err = mmc_wait_for_cmd(host, &cmd, 0); 530 if (err) { 531 pr_err("%s: %s: UHS2 CMD send fail, err= 0x%x!\n", 532 mmc_hostname(host), __func__, err); 533 return -EIO; 534 } 535 536 if (!(resp[2] & 0x80)) 537 break; 538 539 DBG("%s: %s: UHS2 SET PHY Settings fail, res= 0x%x!\n", 540 mmc_hostname(host), __func__, resp[2]); 541 } 542 543 DBG("SET_COMMON_CFG: LINK-TRAN Settings.\n"); 544 arg = ((UHS2_DEV_CONFIG_LINK_TRAN_SET & 0xFF) << 8) | 545 UHS2_NATIVE_CMD_WRITE | 546 UHS2_NATIVE_CMD_PLEN_8B | 547 (UHS2_DEV_CONFIG_LINK_TRAN_SET >> 8); 548 549 plen = 2; 550 551 if (host->uhs2_dev_prop.app_type == UHS2_DEV_CONFIG_APP_SD_MEM) 552 host->uhs2_dev_prop.maxblk_len_set = 553 UHS2_DEV_CONFIG_LT_SET_MAX_BLK_LEN; 554 else 555 host->uhs2_dev_prop.maxblk_len_set = 556 min(host->uhs2_dev_prop.maxblk_len, 557 host->uhs2_caps.maxblk_len); 558 host->uhs2_caps.maxblk_len_set = host->uhs2_dev_prop.maxblk_len_set; 559 560 host->uhs2_dev_prop.n_fcu_set = 561 min(host->uhs2_dev_prop.n_fcu, 562 host->uhs2_caps.n_fcu); 563 host->uhs2_caps.n_fcu_set = host->uhs2_dev_prop.n_fcu_set; 564 565 host->uhs2_dev_prop.n_data_gap_set = 566 max(nMinDataGap, host->uhs2_dev_prop.n_data_gap); 567 568 host->uhs2_caps.n_data_gap_set = host->uhs2_dev_prop.n_data_gap_set; 569 570 host->uhs2_caps.max_retry_set = 3; 571 host->uhs2_dev_prop.max_retry_set = host->uhs2_caps.max_retry_set; 572 573 payload[0] = (host->uhs2_dev_prop.maxblk_len_set << 574 UHS2_DEV_CONFIG_MAX_BLK_LEN_POS) | 575 (host->uhs2_dev_prop.max_retry_set << 576 UHS2_DEV_CONFIG_LT_SET_MAX_RETRY_POS) | 577 (host->uhs2_dev_prop.n_fcu_set << 578 UHS2_DEV_CONFIG_N_FCU_POS); 579 payload[1] = host->uhs2_dev_prop.n_data_gap_set; 580 payload[0] = cpu_to_be32(payload[0]); 581 payload[1] = cpu_to_be32(payload[1]); 582 583 DBG("Begin SET_COMMON_CFG header=0x%x arg=0x%x\n", header, arg); 584 DBG("\t\tpayload[0]=0x%x payload[1]=0x%x\n", payload[0], payload[1]); 585 586 uhs2_cmd_assemble(&cmd, &uhs2_cmd, header, arg, payload, plen, NULL, 0); 587 588 err = mmc_wait_for_cmd(host, &cmd, 0); 589 if (err) { 590 pr_err("%s: %s: UHS2 CMD send fail, err= 0x%x!\n", 591 mmc_hostname(host), __func__, err); 592 return -EIO; 593 } 594 595 DBG("SET_COMMON_CFG: Set Config Completion.\n"); 596 arg = ((UHS2_DEV_CONFIG_GEN_SET & 0xFF) << 8) | 597 UHS2_NATIVE_CMD_WRITE | 598 UHS2_NATIVE_CMD_PLEN_8B | 599 (UHS2_DEV_CONFIG_GEN_SET >> 8); 600 601 plen = 2; 602 payload[0] = 0; 603 payload[1] = UHS2_DEV_CONFIG_GEN_SET_CFG_COMPLETE; 604 payload[0] = cpu_to_be32(payload[0]); 605 payload[1] = cpu_to_be32(payload[1]); 606 607 DBG("Begin SET_COMMON_CFG, header=0x%x, arg=0x%x, payload[0] = 0x%x.\n", 608 header, arg, payload[0]); 609 resp_len = 5; 610 memset(resp, 0, sizeof(resp)); 611 uhs2_cmd_assemble(&cmd, &uhs2_cmd, header, arg, payload, plen, 612 resp, resp_len); 613 614 err = mmc_wait_for_cmd(host, &cmd, 0); 615 if (err) { 616 pr_err("%s: %s: UHS2 CMD send fail, err= 0x%x!\n", 617 mmc_hostname(host), __func__, err); 618 return -EIO; 619 } 620 621 /* Set host Config Setting registers */ 622 if (!host->ops->uhs2_set_reg || 623 host->ops->uhs2_set_reg(host, SET_CONFIG)) { 624 pr_err("%s: %s: UHS2 SET_CONFIG fail!\n", 625 mmc_hostname(host), __func__); 626 return -EIO; 627 } 628 629 return 0; 630 } 631 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org