From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63F0DC2D0A3 for ; Fri, 6 Nov 2020 14:30:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04F1C2078B for ; Fri, 6 Nov 2020 14:30:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726708AbgKFOa0 (ORCPT ); Fri, 6 Nov 2020 09:30:26 -0500 Received: from mail.kernel.org ([198.145.29.99]:60404 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726565AbgKFOa0 (ORCPT ); Fri, 6 Nov 2020 09:30:26 -0500 Received: from gaia (unknown [2.26.170.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D984120719; Fri, 6 Nov 2020 14:30:23 +0000 (UTC) Date: Fri, 6 Nov 2020 14:30:21 +0000 From: Catalin Marinas To: Will Deacon Cc: "linux-arm-kernel@lists.infradead.org" , "linux-arch@vger.kernel.org" , Marc Zyngier , Greg Kroah-Hartman , Peter Zijlstra , Morten Rasmussen , Qais Yousef , Suren Baghdasaryan , "kernel-team@android.com" Subject: Re: [PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support Message-ID: <20201106143020.GG29329@gaia> References: <20201028112206.GD13345@gaia> <20201028112343.GD27927@willie-the-truck> <20201028114945.GE13345@gaia> <20201028124049.GC28091@willie-the-truck> <20201028185620.GK13345@gaia> <20201029222048.GD31375@willie-the-truck> <20201030111846.GC23196@gaia> <20201030161353.GC32582@willie-the-truck> <20201102114444.GC21082@gaia> <20201105213846.GA8600@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201105213846.GA8600@willie-the-truck> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Thu, Nov 05, 2020 at 09:38:46PM +0000, Will Deacon wrote: > Ok. Then we're in agreement about not preventing late-onlining. The problem > then is that the existing 32-bit EL0 capability is a SYSTEM cap so even with > your diff, we still have an issue if you boot on the CPUs that support > 32-bit and then try to online a 64-bit-only core (it will fail). Ah, I focussed too much on the 32-bit capable CPUs coming up late. In my original hack, I made the capability weak based on the config option. Here we want to make it weak based on cmdline but that structure is const (we could remove the const though). > So I think we do need my changes to the existing cap, but perhaps we > could return false from system_supports_32bit_el0() until we've actually > seen a 32-bit capable core. That way you would keep the existing behaviour > on TX2, and we wouldn't get any unusual late-onlining failures. If we see the first 32-bit capable core late, we may report it's available but no proper hwcaps. We could do a combination of a new weak feature together with your always-on 32-bit feature when forced by the cmdline. So the system would support 32-bit if both the system feature (with the detection override) and the asym one are set. However, I think it may be simpler if we made the current feature weak (so no new one) together with a bool somewhere that tells us if we found a CPU that doesn't have 32-bit (asym mode). system_supports_32bit_el0() would check if the cap is set together with (!asym_found || asym_allowed). -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 270E8C4741F for ; Fri, 6 Nov 2020 14:31:47 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D8A420720 for ; Fri, 6 Nov 2020 14:31:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="oTA4k2Ko" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D8A420720 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9/MwaGnsfyKYE8jnjusv/zRqSNTBGwqhoWwRyTstVxc=; b=oTA4k2KoBY575p/L5gQ+i6vBi G7TOugMpLW26A1ady+zavTQm4UTLXOKt9hFo5BF7utEu1llN0qxLooRh8sJZXiINNC5ovUzyJQ5N9 TKpx5BjLB9X9vfSGpPEDYFc3qu1/oXQlgnbsEyc7i/+rr/PWuhmfkKkrqTy07opEK+OtNL1I+9tDf KcVktdNEoMrSXTBXxDlOtQ6+lR37Yp9CI3WK8IijfgEhyVi2/R13kf37UBlflog3WeN28kfcyHEP2 0dEYu5YgCqFf3Cx7EFxLGtN1PjnfzQX2EeYMyqG8ddETnqsSmKIB09fLfSPJ12P2LaoIeqH9AHFdq fEa+XsVKA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb2l3-0004pc-KO; Fri, 06 Nov 2020 14:30:29 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb2l0-0004oi-Sf for linux-arm-kernel@lists.infradead.org; Fri, 06 Nov 2020 14:30:27 +0000 Received: from gaia (unknown [2.26.170.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D984120719; Fri, 6 Nov 2020 14:30:23 +0000 (UTC) Date: Fri, 6 Nov 2020 14:30:21 +0000 From: Catalin Marinas To: Will Deacon Subject: Re: [PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support Message-ID: <20201106143020.GG29329@gaia> References: <20201028112206.GD13345@gaia> <20201028112343.GD27927@willie-the-truck> <20201028114945.GE13345@gaia> <20201028124049.GC28091@willie-the-truck> <20201028185620.GK13345@gaia> <20201029222048.GD31375@willie-the-truck> <20201030111846.GC23196@gaia> <20201030161353.GC32582@willie-the-truck> <20201102114444.GC21082@gaia> <20201105213846.GA8600@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201105213846.GA8600@willie-the-truck> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201106_093027_107744_81D4604A X-CRM114-Status: GOOD ( 18.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-arch@vger.kernel.org" , "kernel-team@android.com" , Peter Zijlstra , Marc Zyngier , Qais Yousef , Greg Kroah-Hartman , Suren Baghdasaryan , Morten Rasmussen , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Nov 05, 2020 at 09:38:46PM +0000, Will Deacon wrote: > Ok. Then we're in agreement about not preventing late-onlining. The problem > then is that the existing 32-bit EL0 capability is a SYSTEM cap so even with > your diff, we still have an issue if you boot on the CPUs that support > 32-bit and then try to online a 64-bit-only core (it will fail). Ah, I focussed too much on the 32-bit capable CPUs coming up late. In my original hack, I made the capability weak based on the config option. Here we want to make it weak based on cmdline but that structure is const (we could remove the const though). > So I think we do need my changes to the existing cap, but perhaps we > could return false from system_supports_32bit_el0() until we've actually > seen a 32-bit capable core. That way you would keep the existing behaviour > on TX2, and we wouldn't get any unusual late-onlining failures. If we see the first 32-bit capable core late, we may report it's available but no proper hwcaps. We could do a combination of a new weak feature together with your always-on 32-bit feature when forced by the cmdline. So the system would support 32-bit if both the system feature (with the detection override) and the asym one are set. However, I think it may be simpler if we made the current feature weak (so no new one) together with a bool somewhere that tells us if we found a CPU that doesn't have 32-bit (asym mode). system_supports_32bit_el0() would check if the cap is set together with (!asym_found || asym_allowed). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel