Hi AKASHI, [FYI, it's a private test report for your RFC patch.] [auto build test WARNING on linus/master] [also build test WARNING on v5.10-rc3] [cannot apply to v3.1 ulf.hansson-mmc/next mmc/mmc-next next-20201106] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/AKASHI-Takahiro/Add-support-UHS-II-for-GL9755/20201106-103058 base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 521b619acdc8f1f5acdac15b84f81fd9515b2aff config: x86_64-randconfig-a006-20201104 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 09ec07827b1128504457a93dee80b2ceee1af600) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu # https://github.com/0day-ci/linux/commit/141b3e8afac92e2891a4f66b6428f36233791342 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review AKASHI-Takahiro/Add-support-UHS-II-for-GL9755/20201106-103058 git checkout 141b3e8afac92e2891a4f66b6428f36233791342 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): >> drivers/mmc/host/sdhci-uhs2.c:117:6: warning: variable 'pwr' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] if (mode != MMC_POWER_OFF) { ^~~~~~~~~~~~~~~~~~~~~ drivers/mmc/host/sdhci-uhs2.c:126:19: note: uninitialized use occurs here if (host->pwr == pwr) ^~~ drivers/mmc/host/sdhci-uhs2.c:117:2: note: remove the 'if' if its condition is always true if (mode != MMC_POWER_OFF) { ^~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mmc/host/sdhci-uhs2.c:109:8: note: initialize the variable 'pwr' to silence this warning u8 pwr; ^ = '\0' >> drivers/mmc/host/sdhci-uhs2.c:453:6: warning: no previous prototype for function 'sdhci_uhs2_set_ios' [-Wmissing-prototypes] void sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ^ drivers/mmc/host/sdhci-uhs2.c:453:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ^ static >> drivers/mmc/host/sdhci-uhs2.c:573:6: warning: logical not is only applied to the left hand side of this bitwise operator [-Wlogical-not-parentheses] if (!host->mmc->flags & MMC_UHS2_SUPPORT) { ^ ~ drivers/mmc/host/sdhci-uhs2.c:573:6: note: add parentheses after the '!' to evaluate the bitwise operator first if (!host->mmc->flags & MMC_UHS2_SUPPORT) { ^ ( ) drivers/mmc/host/sdhci-uhs2.c:573:6: note: add parentheses around left hand side expression to silence this warning if (!host->mmc->flags & MMC_UHS2_SUPPORT) { ^ ( ) drivers/mmc/host/sdhci-uhs2.c:610:6: warning: logical not is only applied to the left hand side of this bitwise operator [-Wlogical-not-parentheses] if (!host->mmc->flags & MMC_UHS2_SUPPORT) ^ ~ drivers/mmc/host/sdhci-uhs2.c:610:6: note: add parentheses after the '!' to evaluate the bitwise operator first if (!host->mmc->flags & MMC_UHS2_SUPPORT) ^ ( ) drivers/mmc/host/sdhci-uhs2.c:610:6: note: add parentheses around left hand side expression to silence this warning if (!host->mmc->flags & MMC_UHS2_SUPPORT) ^ ( ) >> drivers/mmc/host/sdhci-uhs2.c:1492:1: warning: all paths through this function will call itself [-Winfinite-recursion] { ^ drivers/mmc/host/sdhci-uhs2.c:406:20: warning: unused function 'sdhci_led_deactivate' [-Wunused-function] static inline void sdhci_led_deactivate(struct sdhci_host *host) ^ 6 warnings generated. vim +117 drivers/mmc/host/sdhci-uhs2.c 3a247ec35d5a815 AKASHI Takahiro 2020-11-06 104 d95febed81c4431 AKASHI Takahiro 2020-11-06 105 void sdhci_uhs2_set_power(struct sdhci_host *host, unsigned char mode, d95febed81c4431 AKASHI Takahiro 2020-11-06 106 unsigned short vdd) d95febed81c4431 AKASHI Takahiro 2020-11-06 107 { d95febed81c4431 AKASHI Takahiro 2020-11-06 108 struct mmc_host *mmc = host->mmc; d95febed81c4431 AKASHI Takahiro 2020-11-06 109 u8 pwr; d95febed81c4431 AKASHI Takahiro 2020-11-06 110 d95febed81c4431 AKASHI Takahiro 2020-11-06 111 /* FIXME: check if flags & MMC_UHS2_SUPPORT? */ d95febed81c4431 AKASHI Takahiro 2020-11-06 112 if (!(host->mmc->caps & MMC_CAP_UHS2)) { d95febed81c4431 AKASHI Takahiro 2020-11-06 113 sdhci_set_power(host, mode, vdd); d95febed81c4431 AKASHI Takahiro 2020-11-06 114 return; d95febed81c4431 AKASHI Takahiro 2020-11-06 115 } d95febed81c4431 AKASHI Takahiro 2020-11-06 116 d95febed81c4431 AKASHI Takahiro 2020-11-06 @117 if (mode != MMC_POWER_OFF) { d95febed81c4431 AKASHI Takahiro 2020-11-06 118 pwr = sdhci_get_vdd_value(vdd); d95febed81c4431 AKASHI Takahiro 2020-11-06 119 if (!pwr) d95febed81c4431 AKASHI Takahiro 2020-11-06 120 WARN(1, "%s: Invalid vdd %#x\n", d95febed81c4431 AKASHI Takahiro 2020-11-06 121 mmc_hostname(host->mmc), vdd); d95febed81c4431 AKASHI Takahiro 2020-11-06 122 d95febed81c4431 AKASHI Takahiro 2020-11-06 123 pwr |= SDHCI_VDD2_POWER_180; d95febed81c4431 AKASHI Takahiro 2020-11-06 124 } d95febed81c4431 AKASHI Takahiro 2020-11-06 125 d95febed81c4431 AKASHI Takahiro 2020-11-06 126 if (host->pwr == pwr) d95febed81c4431 AKASHI Takahiro 2020-11-06 127 return; d95febed81c4431 AKASHI Takahiro 2020-11-06 128 host ->pwr = pwr; d95febed81c4431 AKASHI Takahiro 2020-11-06 129 d95febed81c4431 AKASHI Takahiro 2020-11-06 130 if (pwr == 0) { d95febed81c4431 AKASHI Takahiro 2020-11-06 131 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); d95febed81c4431 AKASHI Takahiro 2020-11-06 132 d95febed81c4431 AKASHI Takahiro 2020-11-06 133 if (!IS_ERR(host->mmc->supply.vmmc)) d95febed81c4431 AKASHI Takahiro 2020-11-06 134 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); d95febed81c4431 AKASHI Takahiro 2020-11-06 135 if (!IS_ERR_OR_NULL(host->mmc->supply.vmmc2)) d95febed81c4431 AKASHI Takahiro 2020-11-06 136 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc2, 0); d95febed81c4431 AKASHI Takahiro 2020-11-06 137 d95febed81c4431 AKASHI Takahiro 2020-11-06 138 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) d95febed81c4431 AKASHI Takahiro 2020-11-06 139 sdhci_runtime_pm_bus_off(host); d95febed81c4431 AKASHI Takahiro 2020-11-06 140 } else { d95febed81c4431 AKASHI Takahiro 2020-11-06 141 if (!IS_ERR(host->mmc->supply.vmmc)) d95febed81c4431 AKASHI Takahiro 2020-11-06 142 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); d95febed81c4431 AKASHI Takahiro 2020-11-06 143 if (!IS_ERR_OR_NULL(host->mmc->supply.vmmc2)) d95febed81c4431 AKASHI Takahiro 2020-11-06 144 /* support 1.8v only for now */ d95febed81c4431 AKASHI Takahiro 2020-11-06 145 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc2, d95febed81c4431 AKASHI Takahiro 2020-11-06 146 fls(MMC_VDD2_165_195) - 1); d95febed81c4431 AKASHI Takahiro 2020-11-06 147 d95febed81c4431 AKASHI Takahiro 2020-11-06 148 /* d95febed81c4431 AKASHI Takahiro 2020-11-06 149 * Spec says that we should clear the power reg before setting d95febed81c4431 AKASHI Takahiro 2020-11-06 150 * a new value. Some controllers don't seem to like this though. d95febed81c4431 AKASHI Takahiro 2020-11-06 151 */ d95febed81c4431 AKASHI Takahiro 2020-11-06 152 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) d95febed81c4431 AKASHI Takahiro 2020-11-06 153 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); d95febed81c4431 AKASHI Takahiro 2020-11-06 154 d95febed81c4431 AKASHI Takahiro 2020-11-06 155 /* d95febed81c4431 AKASHI Takahiro 2020-11-06 156 * At least the Marvell CaFe chip gets confused if we set the d95febed81c4431 AKASHI Takahiro 2020-11-06 157 * voltage and set turn on power at the same time, so set the d95febed81c4431 AKASHI Takahiro 2020-11-06 158 * voltage first. d95febed81c4431 AKASHI Takahiro 2020-11-06 159 */ d95febed81c4431 AKASHI Takahiro 2020-11-06 160 if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) d95febed81c4431 AKASHI Takahiro 2020-11-06 161 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); d95febed81c4431 AKASHI Takahiro 2020-11-06 162 d95febed81c4431 AKASHI Takahiro 2020-11-06 163 /* vdd first */ d95febed81c4431 AKASHI Takahiro 2020-11-06 164 pwr |= SDHCI_POWER_ON; d95febed81c4431 AKASHI Takahiro 2020-11-06 165 sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL); d95febed81c4431 AKASHI Takahiro 2020-11-06 166 mdelay(5); d95febed81c4431 AKASHI Takahiro 2020-11-06 167 d95febed81c4431 AKASHI Takahiro 2020-11-06 168 pwr |= SDHCI_VDD2_POWER_ON; d95febed81c4431 AKASHI Takahiro 2020-11-06 169 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); d95febed81c4431 AKASHI Takahiro 2020-11-06 170 mdelay(5); d95febed81c4431 AKASHI Takahiro 2020-11-06 171 d95febed81c4431 AKASHI Takahiro 2020-11-06 172 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) d95febed81c4431 AKASHI Takahiro 2020-11-06 173 sdhci_runtime_pm_bus_on(host); d95febed81c4431 AKASHI Takahiro 2020-11-06 174 d95febed81c4431 AKASHI Takahiro 2020-11-06 175 /* d95febed81c4431 AKASHI Takahiro 2020-11-06 176 * Some controllers need an extra 10ms delay of 10ms before d95febed81c4431 AKASHI Takahiro 2020-11-06 177 * they can apply clock after applying power d95febed81c4431 AKASHI Takahiro 2020-11-06 178 */ d95febed81c4431 AKASHI Takahiro 2020-11-06 179 if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) d95febed81c4431 AKASHI Takahiro 2020-11-06 180 mdelay(10); d95febed81c4431 AKASHI Takahiro 2020-11-06 181 } d95febed81c4431 AKASHI Takahiro 2020-11-06 182 } d95febed81c4431 AKASHI Takahiro 2020-11-06 183 EXPORT_SYMBOL_GPL(sdhci_uhs2_set_power); d95febed81c4431 AKASHI Takahiro 2020-11-06 184 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org