From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F3C6C388F7 for ; Tue, 10 Nov 2020 07:23:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF20E20781 for ; Tue, 10 Nov 2020 07:23:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="lxwipDA7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726462AbgKJHXW (ORCPT ); Tue, 10 Nov 2020 02:23:22 -0500 Received: from mail.kernel.org ([198.145.29.99]:45126 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726307AbgKJHXV (ORCPT ); Tue, 10 Nov 2020 02:23:21 -0500 Received: from ogabbay-VM.habana-labs.com (unknown [213.57.90.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6C0E7206B6; Tue, 10 Nov 2020 07:23:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604993000; bh=8Qz8LIUkTxY5/gc9OeAz1JzdfBTeCe2Bc+FW79CrHvs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=lxwipDA750+LxYCIEu3zmzw/pUVmCg7SnCXTV+tkp+uRd9HfS7hzKE6EWuqiSM04n JSYs2z775lphf/o41x7822LhK8kSvzL+ukiWXd7qO3bbsyTc3toL9GerxI+wnwO5Bn C0q4F0UuQnc+RBfkG6lgigyNFmnbFtw8EbA34xTQ= Date: Tue, 10 Nov 2020 09:23:10 +0200 From: Oded Gabbay To: Mark Brown Cc: Parav Pandit , Dan Williams , "Ertman, David M" , "alsa-devel@alsa-project.org" , Takashi Iwai , linux-rdma , Jason Gunthorpe , Doug Ledford , Netdev , David Miller , Jakub Kicinski , Greg KH , Ranjani Sridharan , Pierre-Louis Bossart , Fred Oh , Parav Pandit , "Saleem, Shiraz" , "Patil, Kiran" , Linux Kernel Mailing List , Leon Romanovsky Subject: Re: [PATCH v3 01/10] Add auxiliary bus support Message-ID: <20201110072309.GA6508@ogabbay-VM.habana-labs.com> References: <20201023003338.1285642-1-david.m.ertman@intel.com> <20201023003338.1285642-2-david.m.ertman@intel.com> <20201106193537.GH49612@sirena.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201106193537.GH49612@sirena.org.uk> User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org On Fri, Nov 06, 2020 at 07:35:37PM +0000, Mark Brown wrote: > On Thu, Nov 05, 2020 at 08:37:14PM +0000, Parav Pandit wrote: > > > > > This example describes the mlx5 PCI subfunction use case. > > > > I didn't follow your question about 'explicit example'. > > > > What part is missing to identify it as explicit example? > > > > Specifically listing "mlx5" so if someone reading this document thinks to > > > themselves "hey mlx5 sounds like my use case" they can go grep for that. > > > Ah, I see. > > "mlx5" is not listed explicitly, because it is not included in this patchset. > > In various previous discussions in this thread, mlx5 subfunction use case is described that justifies the existence of the bus. > > I will be happy to update this documentation once mlx5 subfunction will be part of kernel so that grep actually shows valid output. > > (waiting to post them as it uses auxiliary bus :-)). > > For ease of review if there's a new version it might be as well to just > reference it anyway, hopefully the mlx5 code will be merged fairly > quickly once the bus itself is merged. It's probably easier all round > than adding the reference later, it seems more likely that mlx5 will get > merged than that it'll fall by the wayside. Another use-case for this patch-set is going to be the habanalabs driver. The GAUDI ASIC is a PCI H/W accelerator for deep-learning which also exposes network ports.We are going to use this auxiliary-bus feature to separate our monolithic driver into several parts that will reside in different subsystems and communicate between them through the bus. Thanks, Oded From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6572FC388F7 for ; Tue, 10 Nov 2020 10:21:45 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 839DD206B2 for ; Tue, 10 Nov 2020 10:21:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="FDkcFCT6"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="lxwipDA7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 839DD206B2 Authentication-Results: mail.kernel.org; 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Tue, 10 Nov 2020 11:15:14 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id DF6FBF80161; Tue, 10 Nov 2020 08:23:26 +0100 (CET) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id E1DE8F800EB for ; Tue, 10 Nov 2020 08:23:23 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz E1DE8F800EB Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="lxwipDA7" Received: from ogabbay-VM.habana-labs.com (unknown [213.57.90.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6C0E7206B6; Tue, 10 Nov 2020 07:23:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604993000; bh=8Qz8LIUkTxY5/gc9OeAz1JzdfBTeCe2Bc+FW79CrHvs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=lxwipDA750+LxYCIEu3zmzw/pUVmCg7SnCXTV+tkp+uRd9HfS7hzKE6EWuqiSM04n JSYs2z775lphf/o41x7822LhK8kSvzL+ukiWXd7qO3bbsyTc3toL9GerxI+wnwO5Bn C0q4F0UuQnc+RBfkG6lgigyNFmnbFtw8EbA34xTQ= Date: Tue, 10 Nov 2020 09:23:10 +0200 From: Oded Gabbay To: Mark Brown Subject: Re: [PATCH v3 01/10] Add auxiliary bus support Message-ID: <20201110072309.GA6508@ogabbay-VM.habana-labs.com> References: <20201023003338.1285642-1-david.m.ertman@intel.com> <20201023003338.1285642-2-david.m.ertman@intel.com> <20201106193537.GH49612@sirena.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201106193537.GH49612@sirena.org.uk> User-Agent: Mutt/1.9.4 (2018-02-28) X-Mailman-Approved-At: Tue, 10 Nov 2020 11:14:56 +0100 Cc: "alsa-devel@alsa-project.org" , Parav Pandit , Greg KH , Takashi Iwai , Netdev , Leon Romanovsky , Ranjani Sridharan , Pierre-Louis Bossart , Fred Oh , linux-rdma , Doug Ledford , Parav Pandit , Jason Gunthorpe , Jakub Kicinski , "Ertman, David M" , Dan Williams , "Saleem, Shiraz" , David Miller , Linux Kernel Mailing List , "Patil, Kiran" X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Fri, Nov 06, 2020 at 07:35:37PM +0000, Mark Brown wrote: > On Thu, Nov 05, 2020 at 08:37:14PM +0000, Parav Pandit wrote: > > > > > This example describes the mlx5 PCI subfunction use case. > > > > I didn't follow your question about 'explicit example'. > > > > What part is missing to identify it as explicit example? > > > > Specifically listing "mlx5" so if someone reading this document thinks to > > > themselves "hey mlx5 sounds like my use case" they can go grep for that. > > > Ah, I see. > > "mlx5" is not listed explicitly, because it is not included in this patchset. > > In various previous discussions in this thread, mlx5 subfunction use case is described that justifies the existence of the bus. > > I will be happy to update this documentation once mlx5 subfunction will be part of kernel so that grep actually shows valid output. > > (waiting to post them as it uses auxiliary bus :-)). > > For ease of review if there's a new version it might be as well to just > reference it anyway, hopefully the mlx5 code will be merged fairly > quickly once the bus itself is merged. It's probably easier all round > than adding the reference later, it seems more likely that mlx5 will get > merged than that it'll fall by the wayside. Another use-case for this patch-set is going to be the habanalabs driver. The GAUDI ASIC is a PCI H/W accelerator for deep-learning which also exposes network ports.We are going to use this auxiliary-bus feature to separate our monolithic driver into several parts that will reside in different subsystems and communicate between them through the bus. Thanks, Oded