From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tero Kristo Date: Tue, 10 Nov 2020 11:05:55 +0200 Subject: [PATCH 19/26] arm: mach-k3: j721e: force enable A72 core 0 during spl shutdown In-Reply-To: <20201110090602.2255-1-t-kristo@ti.com> References: <20201110090602.2255-1-t-kristo@ti.com> Message-ID: <20201110090602.2255-20-t-kristo@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de With the new raw register mode access PM drivers, A72 core is not enabled via ti-sci services, leading into bad usecounts for the core. This effectively shuts down the A72 core when SPL goes down. Prevent the problem by force enabling the A72 core once, which increases the use count. Signed-off-by: Tero Kristo --- arch/arm/mach-k3/j721e_init.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index a36e4ed603..d00a9477a2 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -306,6 +306,7 @@ u32 spl_boot_device(void) #ifdef CONFIG_SYS_K3_SPL_ATF +#define J721E_DEV_A72SS0_CORE0 202 #define J721E_DEV_MCU_RTI0 262 #define J721E_DEV_MCU_RTI1 263 #define J721E_DEV_MCU_ARMSS0_CPU0 250 @@ -324,10 +325,23 @@ void release_resources_for_core_shutdown(void) J721E_DEV_MCU_RTI1, }; + const u32 get_device_ids[] = { + J721E_DEV_A72SS0_CORE0 + }; + ti_sci = get_ti_sci_handle(); dev_ops = &ti_sci->ops.dev_ops; proc_ops = &ti_sci->ops.proc_ops; + /* Iterate through list of devices to get (enable) */ + for (i = 0; i < ARRAY_SIZE(get_device_ids); i++) { + u32 id = get_device_ids[i]; + + ret = dev_ops->get_device(ti_sci, id); + if (ret) + panic("Failed to get device %u (%d)\n", id, ret); + } + /* Iterate through list of devices to put (shutdown) */ for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) { u32 id = put_device_ids[i]; -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki