From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29CA8C55ABD for ; Wed, 11 Nov 2020 13:40:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D1B9820795 for ; Wed, 11 Nov 2020 13:40:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727199AbgKKNkk (ORCPT ); Wed, 11 Nov 2020 08:40:40 -0500 Received: from elvis.franken.de ([193.175.24.41]:53797 "EHLO elvis.franken.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727277AbgKKNkg (ORCPT ); Wed, 11 Nov 2020 08:40:36 -0500 Received: from uucp (helo=alpha) by elvis.franken.de with local-bsmtp (Exim 3.36 #1) id 1kcqMT-0000ID-00; Wed, 11 Nov 2020 14:40:33 +0100 Received: by alpha.franken.de (Postfix, from userid 1000) id 14235C4DDD; Wed, 11 Nov 2020 14:39:46 +0100 (CET) Date: Wed, 11 Nov 2020 14:39:46 +0100 From: Thomas Bogendoerfer To: Arnd Bergmann Cc: Mike Rapoport , Stefan Agner , Minchan Kim , ngupta@vflare.org, Sergey Senozhatsky , Andrew Morton , sjenning@linux.vnet.ibm.com, gregkh , Arnd Bergmann , Linux-MM , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] mm/zsmalloc: include sparsemem.h for MAX_PHYSMEM_BITS Message-ID: <20201111133945.GA12288@alpha.franken.de> References: <20201108064659.GD301837@kernel.org> <7782fb694a6b0c500e8f32ecf895b2bf@agner.ch> <20201110095806.GH301837@kernel.org> <20201110162155.GA4758@kernel.org> <20201111102654.GF4758@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 11, 2020 at 11:57:02AM +0100, Arnd Bergmann wrote: > On Wed, Nov 11, 2020 at 11:26 AM Mike Rapoport wrote: > > > > On Wed, Nov 11, 2020 at 10:33:29AM +0100, Arnd Bergmann wrote: > > > On Tue, Nov 10, 2020 at 5:21 PM Mike Rapoport wrote: > > > > On Tue, Nov 10, 2020 at 12:21:11PM +0100, Arnd Bergmann wrote: > > > > > > > > > > To be on the safe side, we could provoke a compile-time error > > > > > when CONFIG_PHYS_ADDR_T_64BIT is set on a 32-bit > > > > > architecture, but MAX_POSSIBLE_PHYSMEM_BITS is not set. > > > > > > > > Maybe compile time warning and a runtime error in zs_init() if 32 bit > > > > machine has memory above 4G? > > > > > > If the fix is as easy as adding a single line in a header, I think a > > > compile-time > > > error makes it easier, no need to wait for someone to boot a broken > > > system before fixing it. > > > > Not sure it would be as easy as adding a single line in a header for > > MIPS with it's diversity. > > I looked up the architecture, and found: > > - The pre-MIPS32r1 cores only support 32-bit addressing > - octeon selects PHYS_ADDR_T_64BIT but no longer > supports 32-bit kernels > - Alchemy and netlogic (XLR, XLP) have 36-bit addressing > - CONFIG_XPA implies 40-bit addressing MIPS32r5 might have up to 60-bit addressing according to the MIPS32 PRA docuemnt (MD00090). But there is probably no chip, which implements it so for now 40-bit addressing is correct. > > We should run it by the MIPS maintainers, but I think this patch > is sufficient: Do you want me to run it through mips tree or do you need an Acked-By from me ? Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]