On Fri, Oct 02, 2020 at 04:56:13PM +0300, Jarkko Nikula wrote:
> Introduce driver for Synopsys DesignWare PWM Controller used on Intel
> Elkhart Lake.
> 
> Initial implementation is done by Felipe Balbi while he was working at
> Intel with later changes from Raymond Tan and me.
> 
> Co-developed-by: Felipe Balbi (Intel) <balbi@kernel.org>
> Signed-off-by: Felipe Balbi (Intel) <balbi@kernel.org>
> Co-developed-by: Raymond Tan <raymond.tan@intel.com>
> Signed-off-by: Raymond Tan <raymond.tan@intel.com>
> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> ---
> v4. Resend with a minor cleanup
> - I guess previous version got lost since it's not visible in list
>   archive. I was told we have had some email issues
> - Make dev pointer assignment oneliner in probe
> v3. Previous version: https://www.spinics.net/lists/linux-pwm/msg12363.html
> Changes:
> - I got confirmation specification is not publicly available
> - HW is actually fixed inversed polarity by the PWM framework
>   conventions: HW cycle begins with a low period. Fixed polarity and
>   low/high period calculation accordingly
> - Added range check to period and duty_cycle
> - Bogus '*' removed from head of the file comment
> - struct dwc_pwm * passed to readl/writel wrappers instead of __iomem *
> - %pe for error code prints
> - clk_period_ns removed from struct dwc_pwm and use DWC_CLK_PERIOD_NS instead
> - Device pointer removed from struct dwc_pwm, it's already carried in
>   struct pwm_chip
> - Added Limitations paragraph and commenting timer usage flow in code
> - duty_cycle and period capping to 32-bit removed from
>   dwc_pwm_get_state() since PWM core has been converted to 64-bit
> - s/DIV_ROUND_CLOSEST/DIV_ROUND_CLOSEST_ULL/ to fix a link error on
>   32-bit ARM and older GCC-9 build. Reported by kernel test robot
>   <lkp@intel.com> on an internal tree
> - Random cleanups, empty line removals etc
> v2. First version here https://www.spinics.net/lists/linux-pwm/msg12122.html
> Thanks to Uwe Kleine-König for good review comments, hopefully I captured
> them all.
> Changes:
> - Added Felipe's Signed-of-by. I added (Intel) to his kernel.org address
>   to highlight contribution was done while working at Intel
> - Version register read removed as result was unused
> - Order of dwc_pwm_writel() arguments changed to match with writel()
> - Structure initializers use one space instead of tab alignment
> - Error messages added to dwc_pwm_probe()
> - MODULE_LICENSE() Updated based on a review comment and commit bf7fbeeae6db
>   ("module: Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity")
> - Polarity handled. HW supports only normal polarity and driver errors
>   out in case of wrong polarity in dwc_pwm_apply() and returns fixed
>   normal polarity in dwc_pwm_get_state()
> - Running timers are not stopped on probe and remove. Those may be set
>   running by a bootloader and driver should leave them runnning
> - pwm_is_enabled() call changed to pwm->state.enabled in wc_pwm_apply()
> - Co-authors added to MODULE_AUTHOR() and comment
> - mutex removed
> - Add struct dwc_pwm_ctx for register save/restore instead of word array
> - suspend prevented in case of active PWM consumers. Please note this
>   checks only PWMs enabled by Linux consumers and not the ones enabled
>   by bootloader
> - Duplicate linux/pm_runtime.h include removed
> - Only once used trivial functions moved to dwc_pwm_get_state()
> - struct dwc_pwm_driver_data removed and used hard coded properties
>   instead since currently driver supports single device type
> - Driver uses internally 64-bit duty and period calculation and caps
>   them to 32-bit ns max value for PWM core. HW supports 32-bit high and
>   low period counters with 10 ns resolution so HW can do ~42,9 s duty and
>   ~85.9 s period at maximum
> ---
>  drivers/pwm/Kconfig   |   9 ++
>  drivers/pwm/Makefile  |   1 +
>  drivers/pwm/pwm-dwc.c | 319 ++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 329 insertions(+)
>  create mode 100644 drivers/pwm/pwm-dwc.c

Applied, thanks.

Thierry