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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Oleksandr Andrushchenko <andr2000@gmail.com>
Cc: <Rahul.Singh@arm.com>, <Bertrand.Marquis@arm.com>,
	<julien.grall@arm.com>, <jbeulich@suse.com>,
	<sstabellini@kernel.org>, <xen-devel@lists.xenproject.org>,
	<iwj@xenproject.org>, <wl@xen.org>,
	Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Subject: Re: [PATCH 09/10] vpci/rcar: Implement vPCI.update_bar_header callback
Date: Thu, 12 Nov 2020 11:00:54 +0100	[thread overview]
Message-ID: <20201112100054.z46hjf2qzcag6sv7@Air-de-Roger> (raw)
In-Reply-To: <20201109125031.26409-10-andr2000@gmail.com>

On Mon, Nov 09, 2020 at 02:50:30PM +0200, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
> 
> Update hardware domain's BAR header as R-Car Gen3 is a non-ECAM host
> controller, so vPCI MMIO handlers do not work for it in hwdom.
> 
> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
> ---
>  xen/arch/arm/pci/pci-host-rcar-gen3.c | 69 +++++++++++++++++++++++++++
>  1 file changed, 69 insertions(+)
> 
> diff --git a/xen/arch/arm/pci/pci-host-rcar-gen3.c b/xen/arch/arm/pci/pci-host-rcar-gen3.c
> index ec14bb29a38b..353ac2bfd6e6 100644
> --- a/xen/arch/arm/pci/pci-host-rcar-gen3.c
> +++ b/xen/arch/arm/pci/pci-host-rcar-gen3.c
> @@ -23,6 +23,7 @@
>  #include <xen/pci.h>
>  #include <asm/pci.h>
>  #include <xen/vmap.h>
> +#include <xen/vpci.h>
>  
>  /* Error values that may be returned by PCI functions */
>  #define PCIBIOS_SUCCESSFUL		0x00
> @@ -307,12 +308,80 @@ int pci_rcar_gen3_config_write(struct pci_host_bridge *bridge, uint32_t _sbdf,
>      return ret;
>  }
>  
> +static void pci_rcar_gen3_hwbar_init(const struct pci_dev *pdev,
> +                                     struct vpci_header *header)
> +
> +{
> +    static bool once = true;
> +    struct vpci_bar *bars = header->bars;
> +    unsigned int num_bars;
> +    int i;

unsigned.

> +
> +    /* Run only once. */
> +    if (!once)

Missing spaces.

> +        return;
> +    once = false;
> +
> +    printk("\n\n ------------------------ %s -------------------\n", __func__);
> +    switch ( pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f )
> +    {
> +    case PCI_HEADER_TYPE_NORMAL:
> +        num_bars = PCI_HEADER_NORMAL_NR_BARS;
> +        break;
> +
> +    case PCI_HEADER_TYPE_BRIDGE:
> +        num_bars = PCI_HEADER_BRIDGE_NR_BARS;
> +        break;
> +
> +    default:
> +        return;
> +    }
> +
> +    for ( i = 0; i < num_bars; i++ )
> +    {
> +        uint8_t reg = PCI_BASE_ADDRESS_0 + i * 4;
> +
> +        if ( bars[i].type == VPCI_BAR_MEM64_HI )
> +        {
> +            /*
> +             * Skip hi part of the 64-bit register: it is read
> +             * together with the lower part.
> +             */
> +            continue;
> +        }
> +
> +        if ( bars[i].type == VPCI_BAR_IO )
> +        {
> +            /* Skip IO. */
> +            continue;
> +        }
> +
> +        if ( bars[i].type == VPCI_BAR_MEM64_LO )
> +        {
> +            /* Read both hi and lo parts of the 64-bit BAR. */
> +            bars[i].addr =
> +                (uint64_t)pci_conf_read32(pdev->sbdf, reg + 4) << 32 |
> +                pci_conf_read32(pdev->sbdf, reg);
> +        }
> +        else if ( bars[i].type == VPCI_BAR_MEM32 )
> +        {
> +            bars[i].addr = pci_conf_read32(pdev->sbdf, reg);
> +        }
> +        else
> +        {
> +            /* Expansion ROM? */
> +            continue;
> +        }

Wouldn't this be much simpler as:

bars[i].addr = 0;
switch ( bars[i].type )
{
case VPCI_BAR_MEM64_HI:
    bars[i].addr = (uint64_t)pci_conf_read32(pdev->sbdf, reg + 4) << 32;
    /+ fallthrough. */
case VPCI_BAR_MEM64_LO:
     bars[i].addr |= pci_conf_read32(pdev->sbdf, reg);
     break;

default:
    break;
}

I also wonder why you only care about the address but not the size of
the BAR.

Thanks, Roger.


  reply	other threads:[~2020-11-12 10:01 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-09 12:50 [PATCH 00/10] [RFC] ARM PCI passthrough configuration and vPCI Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 01/10] pci/pvh: Allow PCI toolstack code run with PVH domains on ARM Oleksandr Andrushchenko
2020-11-11 12:31   ` [SUSPECTED SPAM][PATCH " Roger Pau Monné
2020-11-11 13:10     ` Oleksandr Andrushchenko
2020-11-11 13:55       ` Roger Pau Monné
2020-11-11 14:12         ` Oleksandr Andrushchenko
2020-11-11 14:21           ` Roger Pau Monné
2020-11-09 12:50 ` [PATCH 02/10] arm/pci: Maintain PCI assignable list Oleksandr Andrushchenko
2020-11-11 13:53   ` Roger Pau Monné
2020-11-11 14:38     ` Oleksandr Andrushchenko
2020-11-11 15:03       ` Roger Pau Monné
2020-11-11 15:13         ` Oleksandr Andrushchenko
2020-11-11 15:25           ` Jan Beulich
2020-11-11 15:28             ` Oleksandr Andrushchenko
2020-11-11 14:54   ` Jan Beulich
2020-11-12 12:53     ` Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 03/10] xen/arm: Setup MMIO range trap handlers for hardware domain Oleksandr Andrushchenko
2020-11-11 14:39   ` Roger Pau Monné
2020-11-11 14:42     ` Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 04/10] [WORKAROUND] xen/arm: Update hwdom's p2m to trap ECAM space Oleksandr Andrushchenko
2020-11-11 14:44   ` Roger Pau Monné
2020-11-12 12:54     ` Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 05/10] xen/arm: Process pending vPCI map/unmap operations Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 06/10] vpci: Make every domain handle its own BARs Oleksandr Andrushchenko
2020-11-12  9:40   ` Roger Pau Monné
2020-11-12 13:16     ` Oleksandr Andrushchenko
2020-11-12 14:46       ` Roger Pau Monné
2020-11-13  6:32         ` Oleksandr Andrushchenko
2020-11-13  6:48           ` Oleksandr Andrushchenko
2020-11-13 10:25           ` Jan Beulich
2020-11-13 10:36             ` Julien Grall
2020-11-13 10:53               ` Jan Beulich
2020-11-13 11:06                 ` Julien Grall
2020-11-13 11:26                   ` Jan Beulich
2020-11-13 11:53                     ` Julien Grall
2020-11-13 10:46             ` Oleksandr Andrushchenko
2020-11-13 10:50               ` Jan Beulich
2020-11-13 11:02                 ` Oleksandr Andrushchenko
2020-11-13 11:35                   ` Jan Beulich
2020-11-13 12:41                     ` Oleksandr Andrushchenko
2020-11-13 14:23                       ` Jan Beulich
2020-11-13 14:32                         ` Oleksandr Andrushchenko
2020-11-13 14:38                           ` Jan Beulich
2020-11-13 14:44                             ` Oleksandr Andrushchenko
2020-11-13 14:51                               ` Jan Beulich
2020-11-13 14:52                                 ` Oleksandr Andrushchenko
2020-12-04 14:38                                 ` Oleksandr Andrushchenko
2020-12-07  8:48                                   ` Jan Beulich
2020-12-07  9:11                                     ` Oleksandr Andrushchenko
2020-12-07  9:28                                       ` Jan Beulich
2020-12-07  9:37                                         ` Oleksandr Andrushchenko
2020-12-07  9:50                                           ` Jan Beulich
2020-11-09 12:50 ` [PATCH 07/10] xen/arm: Do not hardcode phycial PCI device addresses Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 08/10] vpci/arm: Allow updating BAR's header for non-ECAM bridges Oleksandr Andrushchenko
2020-11-12  9:56   ` Roger Pau Monné
2020-11-13  6:46     ` Oleksandr Andrushchenko
2020-11-13 10:29   ` Jan Beulich
2020-11-13 10:39     ` Oleksandr Andrushchenko
2020-11-13 10:47       ` Jan Beulich
2020-11-13 10:55         ` Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 09/10] vpci/rcar: Implement vPCI.update_bar_header callback Oleksandr Andrushchenko
2020-11-12 10:00   ` Roger Pau Monné [this message]
2020-11-13  6:50     ` Oleksandr Andrushchenko
2020-11-09 12:50 ` [PATCH 10/10] [HACK] vpci/rcar: Make vPCI know DomD is hardware domain Oleksandr Andrushchenko

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