From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C74CFC55ABD for ; Sat, 14 Nov 2020 21:19:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8F6E92242C for ; Sat, 14 Nov 2020 21:19:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726363AbgKNVSm (ORCPT ); Sat, 14 Nov 2020 16:18:42 -0500 Received: from mga04.intel.com ([192.55.52.120]:48977 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726182AbgKNVSm (ORCPT ); Sat, 14 Nov 2020 16:18:42 -0500 IronPort-SDR: RpTANA/y6l8jtiUNhPkYq70jfMKBYviL656tSgR8UYwStWT4AZlnH5p0jXbeqgrkuFdXtkmK7r /UxlrDu7e+jg== X-IronPort-AV: E=McAfee;i="6000,8403,9805"; a="168023215" X-IronPort-AV: E=Sophos;i="5.77,479,1596524400"; d="scan'208";a="168023215" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2020 13:18:40 -0800 IronPort-SDR: ExfAj2ZqQvzsSiNuKMtVo6WieFeeXJ168W7jZs9Qdz4+f3GfpjUoT5EJ2RTRob4+CIraLP6pnb PP9+UvpuOieg== X-IronPort-AV: E=Sophos;i="5.77,479,1596524400"; d="scan'208";a="475070935" Received: from araj-mobl1.jf.intel.com ([10.251.4.217]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2020 13:18:39 -0800 Date: Sat, 14 Nov 2020 13:18:37 -0800 From: "Raj, Ashok" To: Christoph Hellwig Cc: Thomas Gleixner , Konrad Rzeszutek Wilk , "Tian, Kevin" , Jason Gunthorpe , "Williams, Dan J" , "Jiang, Dave" , Bjorn Helgaas , "vkoul@kernel.org" , "Dey, Megha" , "maz@kernel.org" , "bhelgaas@google.com" , "alex.williamson@redhat.com" , "Pan, Jacob jun" , "Liu, Yi L" , "Lu, Baolu" , "Kumar, Sanjay K" , "Luck, Tony" , "kwankhede@nvidia.com" , "eric.auger@redhat.com" , "parav@mellanox.com" , "rafael@kernel.org" , "netanelg@mellanox.com" , "shahafs@mellanox.com" , "yan.y.zhao@linux.intel.com" , "pbonzini@redhat.com" , "Ortiz, Samuel" , "Hossain, Mona" , "dmaengine@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , "kvm@vger.kernel.org" , Ashok Raj Subject: Re: [PATCH v4 06/17] PCI: add SIOV and IMS capability detection Message-ID: <20201114211837.GB12197@araj-mobl1.jf.intel.com> References: <874klykc7h.fsf@nanos.tec.linutronix.de> <20201109173034.GG2620339@nvidia.com> <87pn4mi23u.fsf@nanos.tec.linutronix.de> <20201110051412.GA20147@otc-nc-03> <875z6dik1a.fsf@nanos.tec.linutronix.de> <20201110141323.GB22336@otc-nc-03> <20201112193253.GG19638@char.us.oracle.com> <877dqqmc2h.fsf@nanos.tec.linutronix.de> <20201114103430.GA9810@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201114103430.GA9810@infradead.org> User-Agent: Mutt/1.9.1 (2017-09-22) Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On Sat, Nov 14, 2020 at 10:34:30AM +0000, Christoph Hellwig wrote: > On Thu, Nov 12, 2020 at 11:42:46PM +0100, Thomas Gleixner wrote: > > DMI vendor name is pretty good final check when the bit is 0. The > > strings I'm aware of are: > > > > QEMU, Bochs, KVM, Xen, VMware, VMW, VMware Inc., innotek GmbH, Oracle > > Corporation, Parallels, BHYVE, Microsoft Corporation > > > > which is not complete but better than nothing ;) > > Which is why I really think we need explicit opt-ins for "native" > SIOV handling and for paravirtualized SIOV handling, with the kernel > not offering support at all without either or a manual override on > the command line. opt-in by device or kernel? The way we are planning to support this is: Device support for IMS - Can discover in device specific means Kernel support for IMS. - Supported by IOMMU driver. each driver can check if (dev_supports_ims() && iommu_supports_ims()) { /* Then IMS is supported in the platform.*/ } until we have vIOMMU support or a hypercall, iommu_supports_ims() will check if X86_FEATURE_HYPERVISOR in addition to the platform id's Thomas mentioned. or on intel platform check for cap.caching_mode=1 and return false. When we add support for getting a native interrupt handle then we will plumb that appropriately. Does this match what you wanted?