From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C96FC55ABD for ; Mon, 16 Nov 2020 09:42:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4059E2067C for ; Mon, 16 Nov 2020 09:42:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728459AbgKPJIP (ORCPT ); Mon, 16 Nov 2020 04:08:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728379AbgKPJIP (ORCPT ); Mon, 16 Nov 2020 04:08:15 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8A40C0613CF for ; Mon, 16 Nov 2020 01:08:14 -0800 (PST) Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1keaUc-0001lp-CB; Mon, 16 Nov 2020 10:08:10 +0100 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1keaUZ-0001Ly-0z; Mon, 16 Nov 2020 10:08:07 +0100 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Vijayakannan Ayyathurai , Thierry Reding Cc: kbuild-all@lists.01.org, Linux Memory Management List , "Lai, Poey Seng" , "Vineetha G. Jaya Kumaran" , Andy Shevchenko , linux-kernel@vger.kernel.org, kernel@pengutronix.de, kernel test robot Subject: [PATCH RFC] pwm: keembay: Fix build failure with -Os Date: Mon, 16 Nov 2020 10:08:04 +0100 Message-Id: <20201116090804.206286-1-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.28.0 In-Reply-To: <202011160303.qi5aRChY-lkp@intel.com> References: <202011160303.qi5aRChY-lkp@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver used this construct: #define KMB_PWM_LEADIN_MASK GENMASK(30, 0) static inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32 mask, u32 val, u32 offset) { u32 buff = readl(priv->base + offset); buff = u32_replace_bits(buff, val, mask); writel(buff, priv->base + offset); } ... keembay_pwm_update_bits(priv, KMB_PWM_LEADIN_MASK, 0, KMB_PWM_LEADIN_OFFSET(pwm->hwpwm)); With CONFIG_CC_OPTIMIZE_FOR_SIZE the compiler (here: gcc 10.2.0) this triggers: In file included from /home/uwe/gsrc/linux/drivers/pwm/pwm-keembay.c:16: In function ‘field_multiplier’, inlined from ‘keembay_pwm_update_bits’ at /home/uwe/gsrc/linux/include/linux/bitfield.h:124:17: /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to ‘__bad_mask’ declared with attribute error: bad bitfield mask 119 | __bad_mask(); | ^~~~~~~~~~~~ In function ‘field_multiplier’, inlined from ‘keembay_pwm_update_bits’ at /home/uwe/gsrc/linux/include/linux/bitfield.h:154:1: /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to ‘__bad_mask’ declared with attribute error: bad bitfield mask 119 | __bad_mask(); | ^~~~~~~~~~~~ The compiler doesn't seem to be able to notice that with field being 0x3ffffff the expression if ((field | (field - 1)) & ((field | (field - 1)) + 1)) __bad_mask(); can be optimized away. So use __always_inline and document the problem in a comment to fix this. Reported-by: kernel test robot Signed-off-by: Uwe Kleine-König --- Hello, I'm not sure this is the right fix. Maybe the bitfield stuff can be changed somehow to make this problem go away, too? Best regards Uwe drivers/pwm/pwm-keembay.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-keembay.c b/drivers/pwm/pwm-keembay.c index 2b6dd070daa4..cdfdef66ff8e 100644 --- a/drivers/pwm/pwm-keembay.c +++ b/drivers/pwm/pwm-keembay.c @@ -63,7 +63,12 @@ static int keembay_clk_enable(struct device *dev, struct clk *clk) return devm_add_action_or_reset(dev, keembay_clk_unprepare, clk); } -static inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32 mask, +/* + * With gcc 10, CONFIG_CC_OPTIMIZE_FOR_SIZE and only "inline" instead of + * "__always_inline" this fails to compile because the compiler doesn't notice + * for all valid masks (e.g. KMB_PWM_LEADIN_MASK) that they are ok. + */ +static __always_inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32 mask, u32 val, u32 offset) { u32 buff = readl(priv->base + offset); -- 2.28.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============7307399956062098492==" MIME-Version: 1.0 From: Uwe Kleine-König To: kbuild-all@lists.01.org Subject: [PATCH RFC] pwm: keembay: Fix build failure with -Os Date: Mon, 16 Nov 2020 10:08:04 +0100 Message-ID: <20201116090804.206286-1-u.kleine-koenig@pengutronix.de> In-Reply-To: <202011160303.qi5aRChY-lkp@intel.com> List-Id: --===============7307399956062098492== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable The driver used this construct: #define KMB_PWM_LEADIN_MASK GENMASK(30, 0) static inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32 m= ask, u32 val, u32 offset) { u32 buff =3D readl(priv->base + offset); buff =3D u32_replace_bits(buff, val, mask); writel(buff, priv->base + offset); } ... keembay_pwm_update_bits(priv, KMB_PWM_LEADIN_MASK, 0, KMB_PWM_LEADIN_OFFSET(pwm->hwpwm)); With CONFIG_CC_OPTIMIZE_FOR_SIZE the compiler (here: gcc 10.2.0) this triggers: In file included from /home/uwe/gsrc/linux/drivers/pwm/pwm-keembay.c:16: In function =E2=80=98field_multiplier=E2=80=99, inlined from =E2=80=98keembay_pwm_update_bits=E2=80=99 at /home/uwe/gs= rc/linux/include/linux/bitfield.h:124:17: /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to =E2=80= =98__bad_mask=E2=80=99 declared with attribute error: bad bitfield mask 119 | __bad_mask(); | ^~~~~~~~~~~~ In function =E2=80=98field_multiplier=E2=80=99, inlined from =E2=80=98keembay_pwm_update_bits=E2=80=99 at /home/uwe/gs= rc/linux/include/linux/bitfield.h:154:1: /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to =E2=80= =98__bad_mask=E2=80=99 declared with attribute error: bad bitfield mask 119 | __bad_mask(); | ^~~~~~~~~~~~ The compiler doesn't seem to be able to notice that with field being 0x3ffffff the expression if ((field | (field - 1)) & ((field | (field - 1)) + 1)) __bad_mask(); can be optimized away. So use __always_inline and document the problem in a comment to fix this. Reported-by: kernel test robot Signed-off-by: Uwe Kleine-K=C3=B6nig --- Hello, I'm not sure this is the right fix. Maybe the bitfield stuff can be changed somehow to make this problem go away, too? Best regards Uwe drivers/pwm/pwm-keembay.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-keembay.c b/drivers/pwm/pwm-keembay.c index 2b6dd070daa4..cdfdef66ff8e 100644 --- a/drivers/pwm/pwm-keembay.c +++ b/drivers/pwm/pwm-keembay.c @@ -63,7 +63,12 @@ static int keembay_clk_enable(struct device *dev, struct= clk *clk) return devm_add_action_or_reset(dev, keembay_clk_unprepare, clk); } = -static inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32 m= ask, +/* + * With gcc 10, CONFIG_CC_OPTIMIZE_FOR_SIZE and only "inline" instead of + * "__always_inline" this fails to compile because the compiler doesn't no= tice + * for all valid masks (e.g. KMB_PWM_LEADIN_MASK) that they are ok. + */ +static __always_inline void keembay_pwm_update_bits(struct keembay_pwm *pr= iv, u32 mask, u32 val, u32 offset) { u32 buff =3D readl(priv->base + offset); -- = 2.28.0 --===============7307399956062098492==--