From: Daniele Alessandrelli <daniele.alessandrelli@linux.intel.com>
To: Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Mark Gross <mgross@linux.intel.com>,
Declan Murphy <declan.murphy@intel.com>,
Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Subject: [PATCH v3 1/3] dt-bindings: crypto: Add Keem Bay OCS HCU bindings
Date: Mon, 16 Nov 2020 18:58:44 +0000 [thread overview]
Message-ID: <20201116185846.773464-2-daniele.alessandrelli@linux.intel.com> (raw)
In-Reply-To: <20201116185846.773464-1-daniele.alessandrelli@linux.intel.com>
From: Declan Murphy <declan.murphy@intel.com>
Add device-tree bindings for the Intel Keem Bay Offload Crypto Subsystem
(OCS) Hashing Control Unit (HCU) crypto driver.
Signed-off-by: Declan Murphy <declan.murphy@intel.com>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: Mark Gross <mgross@linux.intel.com>
---
.../crypto/intel,keembay-ocs-hcu.yaml | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
new file mode 100644
index 000000000000..acb92706d280
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Keem Bay OCS HCU Device Tree Bindings
+
+maintainers:
+ - Declan Murphy <declan.murphy@intel.com>
+ - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
+
+description:
+ The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU)
+ provides hardware-accelerated hashing and HMAC.
+
+properties:
+ compatible:
+ const: intel,keembay-ocs-hcu
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ crypto@3000b000 {
+ compatible = "intel,keembay-ocs-hcu";
+ reg = <0x3000b000 0x1000>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&scmi_clk 94>;
+ };
--
2.26.2
next prev parent reply other threads:[~2020-11-16 18:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 18:58 [PATCH v3 0/3] crypto: Add Keem Bay OCS HCU driver Daniele Alessandrelli
2020-11-16 18:58 ` Daniele Alessandrelli [this message]
2020-12-01 19:39 ` [PATCH v3 1/3] dt-bindings: crypto: Add Keem Bay OCS HCU bindings Rob Herring
2020-11-16 18:58 ` [PATCH v3 2/3] crypto: keembay: Add Keem Bay OCS HCU driver Daniele Alessandrelli
2020-11-19 23:15 ` mark gross
2020-12-14 19:11 ` Daniele Alessandrelli
2020-11-16 18:58 ` [PATCH v3 3/3] MAINTAINERS: Add maintainers for " Daniele Alessandrelli
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