From: Lubomir Rintel <lkundrak@v3.sk>
To: u-boot@lists.denx.de
Subject: [PATCH RFC 05/20] ns16550: Turn on the UME bit if on ARCH_JZ47XX
Date: Tue, 17 Nov 2020 22:00:03 +0100 [thread overview]
Message-ID: <20201117210018.751469-6-lkundrak@v3.sk> (raw)
In-Reply-To: <20201117210018.751469-1-lkundrak@v3.sk>
The jz47xx serial port is essentially a ns16550 with an extra bit that
needs to be turned on. The driver already takes care of it, but not in
the early debug config path.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
---
drivers/serial/ns16550.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 702109b23b6..0cf667c2731 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -326,6 +326,7 @@ static inline void _debug_uart_init(void)
{
struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
int baud_divisor;
+ int fcr = UART_FCR_DEFVAL;
/*
* We copy the code from above because it is already horribly messy.
@@ -335,9 +336,13 @@ static inline void _debug_uart_init(void)
*/
baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
CONFIG_BAUDRATE);
+
+ if (IS_ENABLED(CONFIG_ARCH_JZ47XX))
+ fcr |= UART_FCR_UME;
+
serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
serial_dout(&com_port->mcr, UART_MCRVAL);
- serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
+ serial_dout(&com_port->fcr, fcr);
serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
serial_dout(&com_port->dll, baud_divisor & 0xff);
--
2.28.0
next prev parent reply other threads:[~2020-11-17 21:00 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-17 20:59 [PATCH RFC 00/20] MIPS: Add support for JZ4730 and Skytone Alpha 400 Lubomir Rintel
2020-11-17 20:59 ` [PATCH RFC 01/20] config: Remove CONFIG_SYS_ID_EEPROM Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 02/20] mtd: Allow building nand_spl_simple w/o SPL_NAND_ECC Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 03/20] cmd/mac: Don't build unless CONFIG_CMD_MAC is enabled Lubomir Rintel
2020-11-17 22:17 ` Daniel Schwierzeck
2020-11-17 21:00 ` [PATCH RFC 04/20] mips: Don't access CP0_EBASE on JZ47XX Lubomir Rintel
2020-11-17 21:00 ` Lubomir Rintel [this message]
2020-11-17 22:29 ` [PATCH RFC 05/20] ns16550: Turn on the UME bit if on ARCH_JZ47XX Daniel Schwierzeck
2020-11-18 6:55 ` Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 06/20] clk: Add driver for Ingenic JZ4730 CGU Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 07/20] timer-uclass: Tolerate failure to get clock rate in pre_probe Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 08/20] timer: Add Ingenic JZ4730 timer driver Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 09/20] mmc: Default to JZ47XX_MMC=y on ARCH_JZ47XX Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 10/20] mmc/jz_mmc: Add a JZ4740 compatible string Lubomir Rintel
2020-11-18 13:56 ` Ezequiel Garcia
2020-11-17 21:00 ` [PATCH RFC 11/20] mmc/jz_mmc: Support wp-gpio/cd-gpio Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 12/20] pinctrl: Add Ingenic JZ4730 pin control and GPIO driver Lubomir Rintel
2020-11-17 22:39 ` Daniel Schwierzeck
2020-11-17 21:00 ` [PATCH RFC 13/20] nand: Use correct prototype of board_nand_init() with SPL_NAND_SIMPLE Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 14/20] nand/raw: Add Ingenic JZ4730 NAND flash driver Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 15/20] watchdog: Add Ingenic JZ4730 watchdog timer driver Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 16/20] net: Add Ingenic JZ4730 Ethernet driver Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 17/20] mips: dts: Add Ingenic JZ4730 Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 18/20] mips/mach-jz47xx: Add Ingenic JZ4730 support Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 19/20] mips: dts: Add Skytone Alpha 400 Lubomir Rintel
2020-11-17 21:00 ` [PATCH RFC 20/20] board: " Lubomir Rintel
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