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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Aditya Swarup <aditya.swarup@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 00/21] Introduce Alderlake-S
Date: Tue, 17 Nov 2020 23:53:40 -0800	[thread overview]
Message-ID: <20201118075340.did5zvrwa5qhbp6u@ldmartin-desk1> (raw)
In-Reply-To: <20201117185029.22078-1-aditya.swarup@intel.com>

+Rodrigo, +Joonas

On Tue, Nov 17, 2020 at 10:50:08AM -0800, Aditya Swarup wrote:
>v2 of the patch series to introduce ADL-S.
>
>v1 for the series is posted at:
>https://patchwork.freedesktop.org/series/82917/
>
>This series is rebased after hotplug refactors and review
>comments addressed from v1.
>
>Please ignore the DG1 patch as it is cherry-picked to fix
>conflicts.
>
>Aditya Swarup (8):
>  drm/i915/dg1: Enable ports
>  drm/i915/tgl: Fix macros for TGL SOC based WA
>  drm/i915/adl_s: Configure DPLL for ADL-S
>  drm/i915/adl_s: Configure Port clock registers for ADL-S
>  drm/i915/adl_s: Add HTI support and initialize display for ADL-S
>  drm/i915/adl_s: Add adl-s ddc pin mapping
>  drm/i915/adl_s: Add vbt port and aux channel settings for adls
>  drm/i915/adl_s: Add display, gt, ctx and ADL-S
>
>Anusha Srivatsa (4):
>  drm/i915/adl_s: Add PCH support
>  drm/i915/adl_s: Add Interrupt Support
>  drm/i915/adl_s: Add PHYs for Alderlake S
>  drm/i915/adl_s: Load DMC
>
>Caz Yokoyama (3):
>  drm/i915/adl_s: Add ADL-S platform info and PCI ids
>  x86/gpu: add ADL_S stolen memory support
>  drm/i915/adl_s: MCHBAR memory info registers are moved
>
>José Roberto de Souza (1):
>  drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION
>
>Lucas De Marchi (1):
>  drm/i915/adl_s: Add power wells
>
>Matt Roper (3):
>  drm/i915/adl_s: Update combo PHY master/slave relationships
>  drm/i915/adl_s: Update PHY_MISC programming
>  drm/i915/adl_s: Re-use TGL GuC/HuC firmware
>
>Tejas Upadhyay (1):
>  drm/i915/adl_s: Update memory bandwidth parameters
>
> arch/x86/kernel/early-quirks.c                |   1 +
> drivers/gpu/drm/i915/display/intel_bios.c     |  70 +++++++++--
> drivers/gpu/drm/i915/display/intel_bw.c       |   8 ++
> .../gpu/drm/i915/display/intel_combo_phy.c    |  23 +++-
> drivers/gpu/drm/i915/display/intel_csr.c      |  10 +-
> drivers/gpu/drm/i915/display/intel_ddi.c      |  64 ++++++----
> drivers/gpu/drm/i915/display/intel_display.c  |  37 +++++-
> .../drm/i915/display/intel_display_power.c    |  11 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  38 +++++-
> drivers/gpu/drm/i915/display/intel_hdmi.c     |  20 ++-
> drivers/gpu/drm/i915/display/intel_psr.c      |   4 +-
> drivers/gpu/drm/i915/display/intel_sprite.c   |   8 +-
> drivers/gpu/drm/i915/display/intel_vbt_defs.h |   4 +
> drivers/gpu/drm/i915/gt/intel_workarounds.c   | 119 ++++++++++++------
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c      |   4 +-
> drivers/gpu/drm/i915/i915_drv.h               |  47 ++++---
> drivers/gpu/drm/i915/i915_irq.c               |   5 +-
> drivers/gpu/drm/i915/i915_pci.c               |  13 ++
> drivers/gpu/drm/i915/i915_reg.h               |  54 +++++++-
> drivers/gpu/drm/i915/intel_device_info.c      |   9 +-
> drivers/gpu/drm/i915/intel_device_info.h      |   1 +
> drivers/gpu/drm/i915/intel_dram.c             |  18 ++-
> drivers/gpu/drm/i915/intel_pch.c              |   8 +-
> drivers/gpu/drm/i915/intel_pch.h              |   3 +
> drivers/gpu/drm/i915/intel_pm.c               |   2 +-
> include/drm/i915_pciids.h                     |  13 ++

besides the changes to uC and workarounds, all the rest would go
through dinq. Should we bother creating a topic branch for adl-s?

Lucas De Marchi

> 26 files changed, 464 insertions(+), 130 deletions(-)
>
>-- 
>2.27.0
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  parent reply	other threads:[~2020-11-18  7:53 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-17 18:50 [Intel-gfx] [PATCH 00/21] Introduce Alderlake-S Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 01/21] drm/i915/dg1: Enable ports Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 02/21] drm/i915/tgl: Fix macros for TGL SOC based WA Aditya Swarup
2020-11-17 19:03   ` Souza, Jose
2020-11-17 19:28     ` Lucas De Marchi
2020-11-17 19:33       ` Souza, Jose
2020-11-18  7:56         ` Lucas De Marchi
2020-11-17 19:31   ` Lucas De Marchi
2020-11-18  9:18     ` Jani Nikula
2020-11-24  1:32       ` Aditya Swarup
2020-11-24 13:14         ` Lucas De Marchi
2020-11-24 14:20           ` Jani Nikula
2020-11-24 20:11             ` Lucas De Marchi
2020-11-25  0:48               ` Aditya Swarup
2020-11-25  8:36                 ` Jani Nikula
2020-11-17 18:50 ` [Intel-gfx] [PATCH 03/21] drm/i915/adl_s: Add ADL-S platform info and PCI ids Aditya Swarup
2020-11-17 19:17   ` Jani Nikula
2020-11-24  1:50     ` Aditya Swarup
2020-11-24  9:28       ` Jani Nikula
2020-11-17 18:50 ` [Intel-gfx] [PATCH 04/21] x86/gpu: add ADL_S stolen memory support Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 05/21] drm/i915/adl_s: Add PCH support Aditya Swarup
2020-11-20  0:09   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 06/21] drm/i915/adl_s: Add Interrupt Support Aditya Swarup
2020-11-20  0:12   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 07/21] drm/i915/adl_s: Add PHYs for Alderlake S Aditya Swarup
2020-11-20  0:20   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 08/21] drm/i915/adl_s: Configure DPLL for ADL-S Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 09/21] drm/i915/adl_s: Configure Port clock registers " Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 10/21] drm/i915/adl_s: Add HTI support and initialize display " Aditya Swarup
2020-11-20  0:27   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 11/21] drm/i915/adl_s: Add adl-s ddc pin mapping Aditya Swarup
2020-11-20  0:33   ` Matt Roper
2020-11-17 18:50 ` [Intel-gfx] [PATCH 12/21] drm/i915/adl_s: Add vbt port and aux channel settings for adls Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 13/21] drm/i915/adl_s: Update combo PHY master/slave relationships Aditya Swarup
2020-11-25 23:38   ` Srivatsa, Anusha
2020-11-17 18:50 ` [Intel-gfx] [PATCH 14/21] drm/i915/adl_s: Update PHY_MISC programming Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 15/21] drm/i915/adl_s: Add display, gt, ctx and ADL-S Aditya Swarup
2020-12-01 18:46   ` Srivatsa, Anusha
2020-12-01 20:51     ` Lucas De Marchi
2020-11-17 18:50 ` [Intel-gfx] [PATCH 16/21] drm/i915/adl_s: MCHBAR memory info registers are moved Aditya Swarup
2020-11-20 20:18   ` Lucas De Marchi
2020-11-20 20:39     ` Caz Yokoyama
2020-11-25  0:11   ` Lucas De Marchi
2020-11-17 18:50 ` [Intel-gfx] [PATCH 17/21] drm/i915/adl_s: Add power wells Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 18/21] drm/i915/adl_s: Re-use TGL GuC/HuC firmware Aditya Swarup
2020-11-25 22:52   ` Srivatsa, Anusha
2020-11-17 18:50 ` [Intel-gfx] [PATCH 19/21] drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION Aditya Swarup
2020-12-01 18:35   ` Srivatsa, Anusha
2020-11-17 18:50 ` [Intel-gfx] [PATCH 20/21] drm/i915/adl_s: Load DMC Aditya Swarup
2020-11-17 18:50 ` [Intel-gfx] [PATCH 21/21] drm/i915/adl_s: Update memory bandwidth parameters Aditya Swarup
2020-11-25 22:46   ` Srivatsa, Anusha
2020-11-18  1:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Alderlake-S (rev2) Patchwork
2020-11-18  1:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-18  1:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-18  7:53 ` Lucas De Marchi [this message]
2020-11-18 15:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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