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Fri, 20 Nov 2020 17:32:41 +0000 (GMT) Received: from lombard-p52.ibmuc.com (unknown [9.171.3.40]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 20 Nov 2020 17:32:41 +0000 (GMT) From: Christophe Lombard To: linuxppc-dev@lists.ozlabs.org, fbarrat@linux.vnet.ibm.com, ajd@linux.ibm.com Subject: [PATCH V2 0/5] ocxl: Mmio invalidation support Date: Fri, 20 Nov 2020 18:32:36 +0100 Message-Id: <20201120173241.59229-1-clombard@linux.vnet.ibm.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312, 18.0.737 definitions=2020-11-20_09:2020-11-20, 2020-11-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 mlxlogscore=999 suspectscore=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 clxscore=1015 malwarescore=0 spamscore=0 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2011200116 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" OpenCAPI 4.0/5.0 with TLBI/SLBI Snooping, is not used due to performance problems caused by the PAU having to process all incoming TLBI/SLBI commands which will cause them to back up on the PowerBus. When the Address Translation Mode requires TLB operations to be initiated using MMIO registers, a set of registers like the following is used: • XTS MMIO ATSD0 LPARID register • XTS MMIO ATSD0 AVA register • XTS MMIO ATSD0 launch register, write access initiates a shoot down • XTS MMIO ATSD0 status register The MMIO based mechanism also blocks the NPU/PAU from snooping TLBIE commands from the PowerBus. The Shootdown commands (ATSD) will be generated using MMIO registers in the NPU/PAU and sent to the device. Signed-off-by: Christophe Lombard --- Changelog[v2] - Rebase to latest upstream. - Create a set of smaller patches - Move the device tree parsing and ioremap() for the shootdown page in a platform-specific file (powernv) - Release the shootdown page in release_xsl() - Initialize atsd_lock - Move the code to initiate the TLB Invalidate command in a platform-specific file (powernv) - Use the notifier invalidate_range --- Christophe Lombard (5): ocxl: Assign a register set to a Logical Partition ocxl: Initiate a TLB invalidate command ocxl: Update the Process Element Entry ocxl: Add mmu notifier ocxl: Add new kernel traces arch/powerpc/include/asm/pnv-ocxl.h | 53 +++++++++++++ arch/powerpc/platforms/powernv/ocxl.c | 103 ++++++++++++++++++++++++++ drivers/misc/ocxl/context.c | 4 +- drivers/misc/ocxl/link.c | 66 ++++++++++++++++- drivers/misc/ocxl/ocxl_internal.h | 4 +- drivers/misc/ocxl/trace.h | 64 ++++++++++++++++ drivers/scsi/cxlflash/ocxl_hw.c | 6 +- include/misc/ocxl.h | 2 +- 8 files changed, 295 insertions(+), 7 deletions(-) -- 2.28.0