From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8B1CC64E90 for ; Mon, 30 Nov 2020 22:35:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 83FE520705 for ; Mon, 30 Nov 2020 22:35:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="wLXCzGza" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730847AbgK3Wfz (ORCPT ); Mon, 30 Nov 2020 17:35:55 -0500 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:40607 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730753AbgK3Wfy (ORCPT ); Mon, 30 Nov 2020 17:35:54 -0500 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 670C9806A8; Tue, 1 Dec 2020 11:35:11 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1606775711; bh=j1o8Z1G2dtitXOlimluovlxKc4vbfO3wabNM431FbrM=; h=From:To:Cc:Subject:Date; b=wLXCzGzaVF+m+7uOhnKjEUuCAJSY8f7EPU/Rdic74LgnxVcodBaWDPTE6bVU2cslh zW6GvmD4GTwHw4UEHgbYYW25piBtB8BAmAwIa+fhlSZlXH42r7843eNi0RtA1Y+rWS bqNEGoSarWEkpXlTI4ozs3mlcuzf4X630i3DwBgJcAreGUF+35CWonLXBkp8Br+XYV gSjFPlX5RrXv8txTTEZudYwLktjbIyY3+QWqWi4ZhrJRuwEO1ExwCyif1kBkgKEncU rcbdX5qdNTLJ4Yfz9vhSu6D9yDikUtaZ5qCW/PPNNzU0UbCG556dqDTvKMbAN/JFWe jyj90r7pV2Z4g== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Tue, 01 Dec 2020 11:35:10 +1300 Received: from aryans-dl.ws.atlnz.lc (aryans-dl.ws.atlnz.lc [10.33.21.30]) by smtp (Postfix) with ESMTP id E6A5213EEBB; Tue, 1 Dec 2020 11:35:09 +1300 (NZDT) Received: by aryans-dl.ws.atlnz.lc (Postfix, from userid 1844) id 1B41014C2F7F; Tue, 1 Dec 2020 11:35:11 +1300 (NZDT) From: Aryan Srivastava To: robh+dt@kernel.org, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, chris.packham@alliedtelesis.co.nz, Aryan Srivastava Subject: [PATCH v2] ARM: dts: mvebu: Add device tree for ATL-x530 Board Date: Tue, 1 Dec 2020 11:35:07 +1300 Message-Id: <20201130223507.23571-1-aryan.srivastava@alliedtelesis.co.nz> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable x-atlnz-ls: pat Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add device tree file for x530 board. This has an Armada 385 SoC. Has NAND-flash for user storage and SPI for booting. Covers majority of x530 and GS980MX variants. Signed-off-by: Aryan Srivastava Reviewed-by: Chris Packham --- Notes: Changes in v2: -Adding to Makefile arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-385-atl-x530.dts | 235 ++++++++++++++++++++++ 2 files changed, 236 insertions(+) create mode 100644 arch/arm/boot/dts/armada-385-atl-x530.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a60407ad7347..d65d84e9bf9c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1320,6 +1320,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) +=3D \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) +=3D \ armada-382-rd-ac3x-48g4x2xl.dtb \ + armada-385-atl-x530.dtb\ armada-385-clearfog-gtr-s4.dtb \ armada-385-clearfog-gtr-l8.dtb \ armada-385-db-88f6820-amc.dtb \ diff --git a/arch/arm/boot/dts/armada-385-atl-x530.dts b/arch/arm/boot/dt= s/armada-385-atl-x530.dts new file mode 100644 index 000000000000..2041bf09c578 --- /dev/null +++ b/arch/arm/boot/dts/armada-385-atl-x530.dts @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board. + (x530/AT-GS980MX) + * + Copyright (C) 2020 Allied Telesis Labs + */ + +/dts-v1/; +#include "armada-385.dtsi" + +#include + +/ { + model =3D "x530/AT-GS980MX"; + compatible =3D "alliedtelesis,gs980mx", "alliedtelesis,x530", "marvell,= armada385", "marvell,armada380"; + + chosen { + stdout-path =3D "serial1:115200n8"; + }; + + memory { + device_type =3D "memory"; + reg =3D <0x00000000 0x40000000>; /* 1GB */ + }; + + soc { + ranges =3D ; + + internal-regs { + i2c0: i2c@11000 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; + status =3D "okay"; + }; + + uart0: serial@12000 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pins>; + status =3D "okay"; + }; + }; + }; +}; + +&pciec { + status =3D "okay"; +}; + +&pcie1 { + status =3D "okay"; + reset-gpios =3D <&gpio1 23 GPIO_ACTIVE_LOW>; + reset-delay-us =3D <400000>; +}; + +&pcie2 { + status =3D "okay"; +}; + +&devbus_cs1 { + compatible =3D "marvell,mvebu-devbus"; + status =3D "okay"; + + devbus,bus-width =3D <8>; + devbus,turn-off-ps =3D <60000>; + devbus,badr-skew-ps =3D <0>; + devbus,acc-first-ps =3D <124000>; + devbus,acc-next-ps =3D <248000>; + devbus,rd-setup-ps =3D <0>; + devbus,rd-hold-ps =3D <0>; + + /* Write parameters */ + devbus,sync-enable =3D <0>; + devbus,wr-high-ps =3D <60000>; + devbus,wr-low-ps =3D <60000>; + devbus,ale-wr-ps =3D <60000>; + + nvs@0 { + status =3D "okay"; + + compatible =3D "mtd-ram"; + reg =3D <0 0x00080000>; + bank-width =3D <1>; + label =3D "nvs"; + }; +}; + +&pinctrl { + i2c0_gpio_pins: i2c-gpio-pins-0 { + marvell,pins =3D "mpp2", "mpp3"; + marvell,function =3D "gpio"; + }; +}; + +&i2c0 { + clock-frequency =3D <100000>; + status =3D "okay"; + + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&i2c0_pins>; + pinctrl-1 =3D <&i2c0_gpio_pins>; + scl-gpio =3D <&gpio0 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + sda-gpio =3D <&gpio0 3 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + + i2c0mux: mux@71 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "nxp,pca9544"; + reg =3D <0x71>; + i2c-mux-idle-disconnect; + + i2c@0 { /* POE devices MUX */ + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + }; + + i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + + adt7476_2e: hwmon@2e { + compatible =3D "adi,adt7476"; + reg =3D <0x2e>; + }; + + adt7476_2d: hwmon@2d { + compatible =3D "adi,adt7476"; + reg =3D <0x2d>; + }; + }; + + i2c@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + + rtc@68 { + compatible =3D "dallas,ds1340"; + reg =3D <0x68>; + }; + }; + + i2c@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + + gpio@20 { + compatible =3D "nxp,pca9554"; + gpio-controller; + #gpio-cells =3D <2>; + reg =3D <0x20>; + }; + }; + }; +}; + +&usb0 { + status =3D "okay"; +}; + +&spi1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi1_pins>; + status =3D "okay"; + + spi-flash@0 { + #address-cells =3D <1>; + #size-cells =3D <1>; + compatible =3D "jedec,spi-nor"; + reg =3D <1>; /* Chip select 1 */ + spi-max-frequency =3D <54000000>; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + partition@u-boot { + reg =3D <0x00000000 0x00100000>; + label =3D "u-boot"; + }; + partition@u-boot-env { + reg =3D <0x00100000 0x00040000>; + label =3D "u-boot-env"; + }; + partition@unused { + reg =3D <0x00140000 0x00e80000>; + label =3D "unused"; + }; + partition@idprom { + reg =3D <0x00fc0000 0x00040000>; + label =3D "idprom"; + }; + }; + }; +}; + +&nand_controller { + status =3D "okay"; + + nand@0 { + reg =3D <0>; + label =3D "pxa3xx_nand-0"; + nand-rb =3D <0>; + nand-on-flash-bbt; + nand-ecc-strength =3D <4>; + nand-ecc-step-size =3D <512>; + + marvell,nand-enable-arbiter; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + partition@user { + reg =3D <0x00000000 0x0f000000>; + label =3D "user"; + }; + partition@errlog { + /* Maximum mtdoops size is 8MB, so set to that. */ + reg =3D <0x0f000000 0x00800000>; + label =3D "errlog"; + }; + partition@nand-bbt { + reg =3D <0x0f800000 0x00800000>; + label =3D "nand-bbt"; + }; + }; + }; +}; + --=20 2.29.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51CFCC64E7B for ; Mon, 30 Nov 2020 22:37:00 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C40B20725 for ; Mon, 30 Nov 2020 22:36:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="HoSm1T80"; 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Tue, 01 Dec 2020 11:35:10 +1300 Received: from aryans-dl.ws.atlnz.lc (aryans-dl.ws.atlnz.lc [10.33.21.30]) by smtp (Postfix) with ESMTP id E6A5213EEBB; Tue, 1 Dec 2020 11:35:09 +1300 (NZDT) Received: by aryans-dl.ws.atlnz.lc (Postfix, from userid 1844) id 1B41014C2F7F; Tue, 1 Dec 2020 11:35:11 +1300 (NZDT) From: Aryan Srivastava To: robh+dt@kernel.org, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com Subject: [PATCH v2] ARM: dts: mvebu: Add device tree for ATL-x530 Board Date: Tue, 1 Dec 2020 11:35:07 +1300 Message-Id: <20201130223507.23571-1-aryan.srivastava@alliedtelesis.co.nz> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 x-atlnz-ls: pat X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201130_173524_668624_DA62DCE5 X-CRM114-Status: GOOD ( 24.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, chris.packham@alliedtelesis.co.nz, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Aryan Srivastava Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device tree file for x530 board. This has an Armada 385 SoC. Has NAND-flash for user storage and SPI for booting. Covers majority of x530 and GS980MX variants. Signed-off-by: Aryan Srivastava Reviewed-by: Chris Packham --- Notes: Changes in v2: -Adding to Makefile arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-385-atl-x530.dts | 235 ++++++++++++++++++++++ 2 files changed, 236 insertions(+) create mode 100644 arch/arm/boot/dts/armada-385-atl-x530.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a60407ad7347..d65d84e9bf9c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1320,6 +1320,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \ armada-382-rd-ac3x-48g4x2xl.dtb \ + armada-385-atl-x530.dtb\ armada-385-clearfog-gtr-s4.dtb \ armada-385-clearfog-gtr-l8.dtb \ armada-385-db-88f6820-amc.dtb \ diff --git a/arch/arm/boot/dts/armada-385-atl-x530.dts b/arch/arm/boot/dts/armada-385-atl-x530.dts new file mode 100644 index 000000000000..2041bf09c578 --- /dev/null +++ b/arch/arm/boot/dts/armada-385-atl-x530.dts @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board. + (x530/AT-GS980MX) + * + Copyright (C) 2020 Allied Telesis Labs + */ + +/dts-v1/; +#include "armada-385.dtsi" + +#include + +/ { + model = "x530/AT-GS980MX"; + compatible = "alliedtelesis,gs980mx", "alliedtelesis,x530", "marvell,armada385", "marvell,armada380"; + + chosen { + stdout-path = "serial1:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x40000000>; /* 1GB */ + }; + + soc { + ranges = ; + + internal-regs { + i2c0: i2c@11000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + }; + + uart0: serial@12000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; + }; + }; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie1 { + status = "okay"; + reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; + reset-delay-us = <400000>; +}; + +&pcie2 { + status = "okay"; +}; + +&devbus_cs1 { + compatible = "marvell,mvebu-devbus"; + status = "okay"; + + devbus,bus-width = <8>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; + + nvs@0 { + status = "okay"; + + compatible = "mtd-ram"; + reg = <0 0x00080000>; + bank-width = <1>; + label = "nvs"; + }; +}; + +&pinctrl { + i2c0_gpio_pins: i2c-gpio-pins-0 { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "gpio"; + }; +}; + +&i2c0 { + clock-frequency = <100000>; + status = "okay"; + + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&i2c0_pins>; + pinctrl-1 = <&i2c0_gpio_pins>; + scl-gpio = <&gpio0 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + sda-gpio = <&gpio0 3 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + + i2c0mux: mux@71 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,pca9544"; + reg = <0x71>; + i2c-mux-idle-disconnect; + + i2c@0 { /* POE devices MUX */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + adt7476_2e: hwmon@2e { + compatible = "adi,adt7476"; + reg = <0x2e>; + }; + + adt7476_2d: hwmon@2d { + compatible = "adi,adt7476"; + reg = <0x2d>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + rtc@68 { + compatible = "dallas,ds1340"; + reg = <0x68>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + gpio@20 { + compatible = "nxp,pca9554"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + }; +}; + +&usb0 { + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <1>; /* Chip select 1 */ + spi-max-frequency = <54000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@u-boot { + reg = <0x00000000 0x00100000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x00100000 0x00040000>; + label = "u-boot-env"; + }; + partition@unused { + reg = <0x00140000 0x00e80000>; + label = "unused"; + }; + partition@idprom { + reg = <0x00fc0000 0x00040000>; + label = "idprom"; + }; + }; + }; +}; + +&nand_controller { + status = "okay"; + + nand@0 { + reg = <0>; + label = "pxa3xx_nand-0"; + nand-rb = <0>; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + marvell,nand-enable-arbiter; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@user { + reg = <0x00000000 0x0f000000>; + label = "user"; + }; + partition@errlog { + /* Maximum mtdoops size is 8MB, so set to that. */ + reg = <0x0f000000 0x00800000>; + label = "errlog"; + }; + partition@nand-bbt { + reg = <0x0f800000 0x00800000>; + label = "nand-bbt"; + }; + }; + }; +}; + -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel