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[120.74.86.66]) by smtp.gmail.com with ESMTPSA id q24sm257447pjd.30.2020.11.30.18.27.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Nov 2020 18:27:15 -0800 (PST) Date: Tue, 1 Dec 2020 11:27:11 +0900 From: AKASHI Takahiro To: Adrian Hunter Cc: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, ben.chuang@genesyslogic.com.tw, greg.tu@genesyslogic.com.tw Subject: Re: [RFC PATCH v3.1 18/27] mmc: sdhci-uhs2: add clock operations Message-ID: <20201201022711.GB43403@laputa> Mail-Followup-To: AKASHI Takahiro , Adrian Hunter , ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, ben.chuang@genesyslogic.com.tw, greg.tu@genesyslogic.com.tw References: <20201106022726.19831-1-takahiro.akashi@linaro.org> <20201106022726.19831-19-takahiro.akashi@linaro.org> <14ad8c85-0dbb-b023-6a0d-7805cc6f0ab8@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <14ad8c85-0dbb-b023-6a0d-7805cc6f0ab8@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 26, 2020 at 10:17:59AM +0200, Adrian Hunter wrote: > On 6/11/20 4:27 am, AKASHI Takahiro wrote: > > This is a sdhci version of mmc's uhs2_[enable|disable]_clk operations. > > > > Signed-off-by: Ben Chuang > > Signed-off-by: AKASHI Takahiro > > --- > > drivers/mmc/host/sdhci-uhs2.c | 41 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 41 insertions(+) > > > > diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c > > index 994dff967e85..55362ace1857 100644 > > --- a/drivers/mmc/host/sdhci-uhs2.c > > +++ b/drivers/mmc/host/sdhci-uhs2.c > > @@ -11,6 +11,7 @@ > > */ > > > > #include > > +#include > > #include > > > > #include "sdhci.h" > > @@ -385,6 +386,42 @@ void sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) > > __sdhci_uhs2_set_ios(mmc, ios); > > } > > > > +static void sdhci_uhs2_disable_clk(struct mmc_host *mmc) > > +{ > > + struct sdhci_host *host = mmc_priv(mmc); > > + u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > + > > + clk &= ~SDHCI_CLOCK_CARD_EN; > > + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); > > +} > > + > > +static void sdhci_uhs2_enable_clk(struct mmc_host *mmc) > > +{ > > + struct sdhci_host *host = mmc_priv(mmc); > > + u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > + ktime_t timeout; > > + > > + clk |= SDHCI_CLOCK_CARD_EN; > > + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); > > + > > + /* Wait max 20 ms */ > > + timeout = ktime_add_ms(ktime_get(), 20); > > + while (1) { > > + bool timedout = ktime_after(ktime_get(), timeout); > > + > > + clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); > > Can use read_poll_timeout(sdhci_readw,..., host, SDHCI_CLOCK_CONTROL) Okay. -Takahiro Akashi > > + if (clk & SDHCI_CLOCK_INT_STABLE) > > + break; > > + if (timedout) { > > + pr_err("%s: Internal clock never stabilised.\n", > > + mmc_hostname(host->mmc)); > > + sdhci_dumpregs(host); > > + return; > > + } > > + udelay(10); > > + } > > +} > > + > > /*****************************************************************************\ > > * * > > * Driver init/exit * > > @@ -556,6 +593,10 @@ static int sdhci_uhs2_host_ops_init(struct sdhci_host *host) > > > > if (!host->mmc_host_ops.uhs2_detect_init) > > host->mmc_host_ops.uhs2_detect_init = sdhci_uhs2_do_detect_init; > > + if (!host->mmc_host_ops.uhs2_disable_clk) > > + host->mmc_host_ops.uhs2_disable_clk = sdhci_uhs2_disable_clk; > > + if (!host->mmc_host_ops.uhs2_enable_clk) > > + host->mmc_host_ops.uhs2_enable_clk = sdhci_uhs2_enable_clk; > > > > return 0; > > } > > >