From: Alex Deucher <alexdeucher@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH 1/2] drm/amdgpu/sdma5.0: enable ctxempty interrupt
Date: Tue, 1 Dec 2020 18:18:15 -0500 [thread overview]
Message-ID: <20201201231816.1241159-1-alexander.deucher@amd.com> (raw)
This is may be required for proper gfxoff operation with
SDMA workloads.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index b208b81005bb..2699b8ea82ed 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
@@ -810,6 +810,15 @@ static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev)
*/
static int sdma_v5_0_rlc_resume(struct amdgpu_device *adev)
{
+ int i;
+ u32 sdma_cntl;
+
+ for (i = 0; i < adev->sdma.num_instances; i++) {
+ sdma_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL));
+ sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, CTXEMPTY_INT_ENABLE, 1);
+ WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), sdma_cntl);
+ }
+
return 0;
}
--
2.25.4
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next reply other threads:[~2020-12-01 23:18 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-01 23:18 Alex Deucher [this message]
2020-12-01 23:18 ` [PATCH 2/2] drm/amdgpu/sdma5.2: enable ctxempty interrupt Alex Deucher
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