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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 08/20] drm/i915/gt: Resubmit the virtual engine on schedule-out
Date: Mon,  7 Dec 2020 19:38:12 +0000	[thread overview]
Message-ID: <20201207193824.18114-8-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20201207193824.18114-1-chris@chris-wilson.co.uk>

Having recognised that we do not change the sibling until we schedule
out, we can then defer the decision to resubmit the virtual engine from
the unwind of the active queue to scheduling out of the virtual context.
This improves our resilence in virtual engine scheduling, and should
eliminate the rare cases of gem_exec_balance failing.

By keeping the unwind order intact on the local engine, we can preserve
data dependency ordering while doing a preempt-to-busy pass until we
have determined the new ELSP. This means that if we try to timeslice
between a virtual engine and a data-dependent ordinary request, the pair
will maintain their relative ordering and we will avoid the
resubmission, cancelling the timeslicing until further change.

The dilemma though is that we then may end up in a situation where the
'demotion' of the virtual request to an ordinary request in the engine
queue results in filling the ELSP[] with virtual requests instead of
spreading the load across the engines. To compensate for this, we mark
each virtual request and refuse to resubmit a virtual request in the
secondary ELSP slots, thus forcing subsequent virtual requests to be
scheduled out after timeslicing. By delaying the decision until we
schedule out, we will avoid unnecessary resubmission.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2079
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2098
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c    | 122 +++++++++++++++----------
 drivers/gpu/drm/i915/gt/selftest_lrc.c |   2 +-
 2 files changed, 77 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 35cded25c6c1..efc8edd9e219 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1111,38 +1111,23 @@ __unwind_incomplete_requests(struct intel_engine_cs *engine)
 
 		__i915_request_unsubmit(rq);
 
-		/*
-		 * Push the request back into the queue for later resubmission.
-		 * If this request is not native to this physical engine (i.e.
-		 * it came from a virtual source), push it back onto the virtual
-		 * engine so that it can be moved across onto another physical
-		 * engine as load dictates.
-		 */
-		if (likely(rq->execution_mask == engine->mask)) {
-			GEM_BUG_ON(rq_prio(rq) == I915_PRIORITY_INVALID);
-			if (rq_prio(rq) != prio) {
-				prio = rq_prio(rq);
-				pl = i915_sched_lookup_priolist(engine, prio);
-			}
-			GEM_BUG_ON(RB_EMPTY_ROOT(&engine->execlists.queue.rb_root));
-
-			list_move(&rq->sched.link, pl);
-			set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
+		GEM_BUG_ON(rq_prio(rq) == I915_PRIORITY_INVALID);
+		if (rq_prio(rq) != prio) {
+			prio = rq_prio(rq);
+			pl = i915_sched_lookup_priolist(engine, prio);
+		}
+		GEM_BUG_ON(RB_EMPTY_ROOT(&engine->execlists.queue.rb_root));
 
-			/* Check in case we rollback so far we wrap [size/2] */
-			if (intel_ring_direction(rq->ring,
-						 rq->tail,
-						 rq->ring->tail + 8) > 0)
-				rq->context->lrc.desc |= CTX_DESC_FORCE_RESTORE;
+		list_move(&rq->sched.link, pl);
+		set_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
 
-			active = rq;
-		} else {
-			struct intel_engine_cs *owner = rq->context->engine;
+		/* Check in case we rollback so far we wrap [size/2] */
+		if (intel_ring_direction(rq->ring,
+					 rq->tail,
+					 rq->ring->tail + 8) > 0)
+			rq->context->lrc.desc |= CTX_DESC_FORCE_RESTORE;
 
-			WRITE_ONCE(rq->engine, owner);
-			owner->submit_request(rq);
-			active = NULL;
-		}
+		active = rq;
 	}
 
 	return active;
@@ -1385,6 +1370,20 @@ static inline void execlists_schedule_in(struct i915_request *rq, int idx)
 	GEM_BUG_ON(intel_context_inflight(ce) != rq->engine);
 }
 
+static void
+resubmit_virtual_request(struct i915_request *rq, struct virtual_engine *ve)
+{
+	struct intel_engine_cs *engine = rq->engine;
+
+	spin_lock_irq(&engine->active.lock);
+
+	clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
+	WRITE_ONCE(rq->engine, &ve->base);
+	ve->base.submit_request(rq);
+
+	spin_unlock_irq(&engine->active.lock);
+}
+
 static void kick_siblings(struct i915_request *rq, struct intel_context *ce)
 {
 	struct virtual_engine *ve = container_of(ce, typeof(*ve), context);
@@ -1405,6 +1404,16 @@ static void kick_siblings(struct i915_request *rq, struct intel_context *ce)
 			cpu_relax();
 	}
 
+	/*
+	 * This engine is now too busy to run this virtual request, so
+	 * see if we can find an alternative engine for it to execute on.
+	 * Once a request has become bonded to this engine, we treat it the
+	 * same as other native request.
+	 */
+	if (i915_request_in_priority_queue(rq) &&
+	    rq->execution_mask != engine->mask)
+		resubmit_virtual_request(rq, ve);
+
 	if (READ_ONCE(ve->request))
 		tasklet_hi_schedule(&ve->base.execlists.tasklet);
 }
@@ -1650,6 +1659,20 @@ assert_pending_valid(const struct intel_engine_execlists *execlists,
 		}
 		sentinel = i915_request_has_sentinel(rq);
 
+		/*
+		 * We want virtual requests to only be in the first slot so
+		 * that they are never stuck behind a hog and can be immediately
+		 * transferred onto the next idle engine.
+		 */
+		if (rq->execution_mask != engine->mask &&
+		    port != execlists->pending) {
+			GEM_TRACE_ERR("%s: virtual engine:%llx not in prime position[%zd]\n",
+				      engine->name,
+				      ce->timeline->fence_context,
+				      port - execlists->pending);
+			return false;
+		}
+
 		/* Hold tightly onto the lock to prevent concurrent retires! */
 		if (!spin_trylock_irqsave(&rq->lock, flags))
 			continue;
@@ -2316,6 +2339,15 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 				if (i915_request_has_sentinel(last))
 					goto done;
 
+				/*
+				 * We avoid submitting virtual requests into
+				 * the secondary ports so that we can migrate
+				 * the request immediately to another engine
+				 * rather than wait for the primary request.
+				 */
+				if (rq->execution_mask != engine->mask)
+					goto done;
+
 				/*
 				 * If GVT overrides us we only ever submit
 				 * port[0], leaving port[1] empty. Note that we
@@ -5723,7 +5755,6 @@ static void virtual_submission_tasklet(unsigned long data)
 static void virtual_submit_request(struct i915_request *rq)
 {
 	struct virtual_engine *ve = to_virtual_engine(rq->engine);
-	struct i915_request *old;
 	unsigned long flags;
 
 	ENGINE_TRACE(&ve->base, "rq=%llx:%lld\n",
@@ -5734,28 +5765,27 @@ static void virtual_submit_request(struct i915_request *rq)
 
 	spin_lock_irqsave(&ve->base.active.lock, flags);
 
-	old = ve->request;
-	if (old) { /* background completion event from preempt-to-busy */
-		GEM_BUG_ON(!i915_request_completed(old));
-		__i915_request_submit(old);
-		i915_request_put(old);
-	}
-
+	/* By the time we resubmit a request, it may be completed */
 	if (i915_request_completed(rq)) {
 		__i915_request_submit(rq);
+		goto unlock;
+	}
 
-		ve->base.execlists.queue_priority_hint = INT_MIN;
-		ve->request = NULL;
-	} else {
-		ve->base.execlists.queue_priority_hint = rq_prio(rq);
-		ve->request = i915_request_get(rq);
+	if (ve->request) { /* background completion from preempt-to-busy */
+		GEM_BUG_ON(!i915_request_completed(ve->request));
+		__i915_request_submit(ve->request);
+		i915_request_put(ve->request);
+	}
 
-		GEM_BUG_ON(!list_empty(virtual_queue(ve)));
-		list_move_tail(&rq->sched.link, virtual_queue(ve));
+	ve->base.execlists.queue_priority_hint = rq_prio(rq);
+	ve->request = i915_request_get(rq);
 
-		tasklet_hi_schedule(&ve->base.execlists.tasklet);
-	}
+	GEM_BUG_ON(!list_empty(virtual_queue(ve)));
+	list_move_tail(&rq->sched.link, virtual_queue(ve));
 
+	tasklet_hi_schedule(&ve->base.execlists.tasklet);
+
+unlock:
 	spin_unlock_irqrestore(&ve->base.active.lock, flags);
 }
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 37cb51c3f4f6..fbbd8343d7f6 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -4589,7 +4589,7 @@ static int reset_virtual_engine(struct intel_gt *gt,
 	spin_lock_irq(&engine->active.lock);
 	__unwind_incomplete_requests(engine);
 	spin_unlock_irq(&engine->active.lock);
-	GEM_BUG_ON(rq->engine != ve->engine);
+	GEM_BUG_ON(rq->engine != engine);
 
 	/* Reset the engine while keeping our active request on hold */
 	execlists_hold(engine, rq);
-- 
2.20.1

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  parent reply	other threads:[~2020-12-07 19:38 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-07 19:38 [Intel-gfx] [PATCH 01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 02/20] drm/i915/gt: Replace direct submit with direct call to tasklet Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 03/20] drm/i915/gt: Use virtual_engine during execlists_dequeue Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 04/20] drm/i915/gt: Decouple inflight virtual engines Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 05/20] drm/i915/gt: Defer schedule_out until after the next dequeue Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 06/20] drm/i915/gt: Remove virtual breadcrumb before transfer Chris Wilson
2020-12-10 17:28   ` Matthew Brost
2020-12-07 19:38 ` [Intel-gfx] [PATCH 07/20] drm/i915/gt: Shrink the critical section for irq signaling Chris Wilson
2020-12-10 17:37   ` Matthew Brost
2020-12-11 11:21     ` Chris Wilson
2020-12-07 19:38 ` Chris Wilson [this message]
2020-12-07 19:38 ` [Intel-gfx] [PATCH 09/20] drm/i915/gt: Simplify virtual engine handling for execlists_hold() Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 10/20] drm/i915/gt: ce->inflight updates are now serialised Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 11/20] drm/i915/gem: Drop free_work for GEM contexts Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 12/20] drm/i915/gt: Track the overall awake/busy time Chris Wilson
2020-12-10 17:51   ` Matthew Brost
2020-12-13 19:51     ` Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 13/20] drm/i915: Encode fence specific waitqueue behaviour into the wait.flags Chris Wilson
2020-12-10 18:03   ` Matthew Brost
2020-12-07 19:38 ` [Intel-gfx] [PATCH 14/20] drm/i915/gt: Track all timelines created using the HWSP Chris Wilson
2020-12-08 11:45   ` [Intel-gfx] [PATCH] " Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 15/20] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 16/20] drm/i915/gt: Track timeline GGTT offset separately from subpage offset Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 17/20] drm/i915/gt: Add timeline "mode" Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 18/20] drm/i915/gt: Use indices for writing into relative timelines Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 19/20] drm/i915/selftests: Exercise relative timeline modes Chris Wilson
2020-12-07 19:38 ` [Intel-gfx] [PATCH 20/20] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines Chris Wilson
2020-12-07 19:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion Patchwork
2020-12-07 20:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-07 21:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-12-08 13:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion (rev2) Patchwork
2020-12-08 13:49 ` [Intel-gfx] [PATCH 01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion Tvrtko Ursulin
2020-12-08 14:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/20] drm/i915/gem: Drop false !i915_vma_is_closed assertion (rev2) Patchwork
2020-12-08 16:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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