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From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: swati2.sharma@intel.com, airlied@linux.ie,
	vandita.kulkarni@intel.com, uma.shankar@intel.com,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v4 11/16] drm/i915: Add support for enabling link status and recovery
Date: Tue,  8 Dec 2020 13:21:40 +0530	[thread overview]
Message-ID: <20201208075145.17389-12-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20201208075145.17389-1-ankit.k.nautiyal@intel.com>

From: Swati Sharma <swati2.sharma@intel.com>

In this patch enables support for detecting link failures between
PCON and HDMI sink in i915 driver. HDMI link loss indication to
upstream DP source is indicated via IRQ_HPD. This is followed by
reading of HDMI link configuration status (HDMI_TX_LINK_ACTIVE_STATUS).
If the PCON → HDMI 2.1 link status is off; reinitiate frl link
training to recover. Also, report HDMI FRL link error count range for
each individual FRL active lane is indicated by
DOWNSTREAM_HDMI_ERROR_STATUS_LN registers.

v2: Checked for dpcd read and write failures and added debug message.
(Uma Shankar)
v3: rearranged code to re-start FRL link training or fall back to
TMDS mode.

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 68 +++++++++++++++++++++++--
 1 file changed, 65 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f8f82fe8c52a..0616779d858e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6032,6 +6032,43 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
 	return link_ok;
 }
 
+static void
+intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp)
+{
+	bool is_active;
+	u8 buf = 0;
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux);
+	if (intel_dp->frl.is_trained && !is_active) {
+		if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, &buf) < 0)
+			return;
+
+		buf &=  ~DP_PCON_ENABLE_HDMI_LINK;
+		if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0)
+			return;
+
+		drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux, &intel_dp->attached_connector->base);
+
+		intel_dp->frl.is_trained = false;
+		intel_dp->frl.trained_rate_gbps = 0;
+
+		/* Restart FRL training or fall back to TMDS mode */
+		if (intel_dp_pcon_start_frl_training(intel_dp) < 0) {
+			int ret, mode;
+
+			drm_dbg(&dev_priv->drm, "Couldnt restart FRL, continuing with TMDS mode\n");
+			ret = drm_dp_pcon_reset_frl_config(&intel_dp->aux);
+			mode = drm_dp_pcon_hdmi_link_mode(&intel_dp->aux, NULL);
+
+			if (ret < 0 || mode != DP_PCON_HDMI_MODE_TMDS)
+			drm_dbg(&dev_priv->drm, "Issue with PCON, cannot set TMDS mode\n");
+		} else {
+			drm_dbg(&dev_priv->drm, "FRL Re-training Completed\n");
+		}
+	}
+}
+
 static bool
 intel_dp_needs_link_retrain(struct intel_dp *intel_dp)
 {
@@ -6397,7 +6434,7 @@ intel_dp_hotplug(struct intel_encoder *encoder,
 	return state;
 }
 
-static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
+static void intel_dp_check_device_service_irq(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 	u8 val;
@@ -6421,6 +6458,30 @@ static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
 		drm_dbg_kms(&i915->drm, "Sink specific irq unhandled\n");
 }
 
+static void intel_dp_check_link_service_irq(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	u8 val;
+
+	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
+		return;
+
+	if (drm_dp_dpcd_readb(&intel_dp->aux,
+			      DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &val) != 1 || !val) {
+		drm_dbg_kms(&i915->drm, "Error in reading link service irq vector\n");
+		return;
+	}
+
+	if (drm_dp_dpcd_writeb(&intel_dp->aux,
+			       DP_LINK_SERVICE_IRQ_VECTOR_ESI0, val) != 1) {
+		drm_dbg_kms(&i915->drm, "Error in writing link service irq vector\n");
+		return;
+	}
+
+	if (val & HDMI_LINK_STATUS_CHANGED)
+		intel_dp_handle_hdmi_link_status_change(intel_dp);
+}
+
 /*
  * According to DP spec
  * 5.1.2:
@@ -6460,7 +6521,8 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
 		return false;
 	}
 
-	intel_dp_check_service_irq(intel_dp);
+	intel_dp_check_device_service_irq(intel_dp);
+	intel_dp_check_link_service_irq(intel_dp);
 
 	/* Handle CEC interrupts, if any */
 	drm_dp_cec_irq(&intel_dp->aux);
@@ -6894,7 +6956,7 @@ intel_dp_detect(struct drm_connector *connector,
 	    to_intel_connector(connector)->detect_edid)
 		status = connector_status_connected;
 
-	intel_dp_check_service_irq(intel_dp);
+	intel_dp_check_device_service_irq(intel_dp);
 
 out:
 	if (status != connector_status_connected && !intel_dp->is_mst)
-- 
2.17.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: airlied@linux.ie, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v4 11/16] drm/i915: Add support for enabling link status and recovery
Date: Tue,  8 Dec 2020 13:21:40 +0530	[thread overview]
Message-ID: <20201208075145.17389-12-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20201208075145.17389-1-ankit.k.nautiyal@intel.com>

From: Swati Sharma <swati2.sharma@intel.com>

In this patch enables support for detecting link failures between
PCON and HDMI sink in i915 driver. HDMI link loss indication to
upstream DP source is indicated via IRQ_HPD. This is followed by
reading of HDMI link configuration status (HDMI_TX_LINK_ACTIVE_STATUS).
If the PCON → HDMI 2.1 link status is off; reinitiate frl link
training to recover. Also, report HDMI FRL link error count range for
each individual FRL active lane is indicated by
DOWNSTREAM_HDMI_ERROR_STATUS_LN registers.

v2: Checked for dpcd read and write failures and added debug message.
(Uma Shankar)
v3: rearranged code to re-start FRL link training or fall back to
TMDS mode.

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 68 +++++++++++++++++++++++--
 1 file changed, 65 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f8f82fe8c52a..0616779d858e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6032,6 +6032,43 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
 	return link_ok;
 }
 
+static void
+intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp)
+{
+	bool is_active;
+	u8 buf = 0;
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux);
+	if (intel_dp->frl.is_trained && !is_active) {
+		if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, &buf) < 0)
+			return;
+
+		buf &=  ~DP_PCON_ENABLE_HDMI_LINK;
+		if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0)
+			return;
+
+		drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux, &intel_dp->attached_connector->base);
+
+		intel_dp->frl.is_trained = false;
+		intel_dp->frl.trained_rate_gbps = 0;
+
+		/* Restart FRL training or fall back to TMDS mode */
+		if (intel_dp_pcon_start_frl_training(intel_dp) < 0) {
+			int ret, mode;
+
+			drm_dbg(&dev_priv->drm, "Couldnt restart FRL, continuing with TMDS mode\n");
+			ret = drm_dp_pcon_reset_frl_config(&intel_dp->aux);
+			mode = drm_dp_pcon_hdmi_link_mode(&intel_dp->aux, NULL);
+
+			if (ret < 0 || mode != DP_PCON_HDMI_MODE_TMDS)
+			drm_dbg(&dev_priv->drm, "Issue with PCON, cannot set TMDS mode\n");
+		} else {
+			drm_dbg(&dev_priv->drm, "FRL Re-training Completed\n");
+		}
+	}
+}
+
 static bool
 intel_dp_needs_link_retrain(struct intel_dp *intel_dp)
 {
@@ -6397,7 +6434,7 @@ intel_dp_hotplug(struct intel_encoder *encoder,
 	return state;
 }
 
-static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
+static void intel_dp_check_device_service_irq(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 	u8 val;
@@ -6421,6 +6458,30 @@ static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
 		drm_dbg_kms(&i915->drm, "Sink specific irq unhandled\n");
 }
 
+static void intel_dp_check_link_service_irq(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	u8 val;
+
+	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
+		return;
+
+	if (drm_dp_dpcd_readb(&intel_dp->aux,
+			      DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &val) != 1 || !val) {
+		drm_dbg_kms(&i915->drm, "Error in reading link service irq vector\n");
+		return;
+	}
+
+	if (drm_dp_dpcd_writeb(&intel_dp->aux,
+			       DP_LINK_SERVICE_IRQ_VECTOR_ESI0, val) != 1) {
+		drm_dbg_kms(&i915->drm, "Error in writing link service irq vector\n");
+		return;
+	}
+
+	if (val & HDMI_LINK_STATUS_CHANGED)
+		intel_dp_handle_hdmi_link_status_change(intel_dp);
+}
+
 /*
  * According to DP spec
  * 5.1.2:
@@ -6460,7 +6521,8 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
 		return false;
 	}
 
-	intel_dp_check_service_irq(intel_dp);
+	intel_dp_check_device_service_irq(intel_dp);
+	intel_dp_check_link_service_irq(intel_dp);
 
 	/* Handle CEC interrupts, if any */
 	drm_dp_cec_irq(&intel_dp->aux);
@@ -6894,7 +6956,7 @@ intel_dp_detect(struct drm_connector *connector,
 	    to_intel_connector(connector)->detect_edid)
 		status = connector_status_connected;
 
-	intel_dp_check_service_irq(intel_dp);
+	intel_dp_check_device_service_irq(intel_dp);
 
 out:
 	if (status != connector_status_connected && !intel_dp->is_mst)
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-12-08  7:58 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-08  7:51 [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 01/16] drm/edid: Add additional HFVSDB fields for HDMI2.1 Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 02/16] drm/edid: Parse MAX_FRL field from HFVSDB block Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 03/16] drm/edid: Parse DSC1.2 cap fields " Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 04/16] drm/dp_helper: Add Helpers for FRL Link Training support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 05/16] drm/dp_helper: Add support for link failure detection Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 06/16] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 07/16] drm/dp_helper: Add helpers to configure PCONs RGB-YCbCr Conversion Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-09 17:50   ` Dan Carpenter
2020-12-09 17:50     ` Dan Carpenter
2020-12-09 17:50     ` Dan Carpenter
2020-12-09 17:50     ` [Intel-gfx] " Dan Carpenter
2020-12-10 12:20     ` Nautiyal, Ankit K
2020-12-10 12:20       ` Nautiyal, Ankit K
2020-12-10 12:20       ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-13  7:10   ` Shankar, Uma
2020-12-13  7:10     ` [Intel-gfx] " Shankar, Uma
2020-12-14 13:17     ` Nautiyal, Ankit K
2020-12-14 13:17       ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-08  7:51 ` [PATCH v4 08/16] drm/i915: Capture max frl rate for PCON in dfp cap structure Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 09/16] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 10/16] drm/i915: Check for FRL training before DP Link training Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` Ankit Nautiyal [this message]
2020-12-08  7:51   ` [Intel-gfx] [PATCH v4 11/16] drm/i915: Add support for enabling link status and recovery Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 12/16] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-08  7:51 ` [PATCH v4 13/16] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1 Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-13  7:13   ` Shankar, Uma
2020-12-13  7:13     ` [Intel-gfx] " Shankar, Uma
2020-12-08  7:51 ` [PATCH v4 14/16] drm/i915/display: Configure PCON for DSC1.1 to DSC1.2 encoding Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-13  7:16   ` Shankar, Uma
2020-12-13  7:16     ` [Intel-gfx] " Shankar, Uma
2020-12-08  7:51 ` [PATCH v4 15/16] drm/i915: Let PCON convert from RGB to YUV if it can Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-13  7:23   ` Shankar, Uma
2020-12-13  7:23     ` [Intel-gfx] " Shankar, Uma
2020-12-14 13:27     ` Nautiyal, Ankit K
2020-12-14 13:27       ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-08  7:51 ` [PATCH v4 16/16] drm/i915: Enable PCON configuration for Color Conversion for TGL Ankit Nautiyal
2020-12-08  7:51   ` [Intel-gfx] " Ankit Nautiyal
2020-12-13  7:29   ` Shankar, Uma
2020-12-13  7:29     ` [Intel-gfx] " Shankar, Uma
2020-12-14 13:51     ` Nautiyal, Ankit K
2020-12-14 13:51       ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-08  8:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for DP-HDMI2.1 PCON (rev6) Patchwork
2020-12-08  8:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-12-08  8:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-08  9:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-12-08 10:33 ` [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON Jani Nikula
2020-12-08 10:33   ` [Intel-gfx] " Jani Nikula

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