From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7A9EC4361B for ; Tue, 8 Dec 2020 18:41:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 30BFD206EC for ; Tue, 8 Dec 2020 18:41:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 30BFD206EC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46460 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kmhv7-0005SL-Gx for qemu-devel@archiver.kernel.org; Tue, 08 Dec 2020 13:41:05 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57246) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kmhJJ-0008Cc-L0 for qemu-devel@nongnu.org; Tue, 08 Dec 2020 13:02:02 -0500 Received: from mail-ot1-x342.google.com ([2607:f8b0:4864:20::342]:35679) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kmhJE-0006Pn-Ol for qemu-devel@nongnu.org; Tue, 08 Dec 2020 13:02:01 -0500 Received: by mail-ot1-x342.google.com with SMTP id i6so10534740otr.2 for ; Tue, 08 Dec 2020 10:01:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sz4OfX2JcpPtJYKWU9aAlMNGI1f4lYPUyryiQe7SsD4=; b=eSdpL6M6pT0Trz9laEZRwTYV+hEirnUnX9+F77rG+Ma6Klldh/GtOEd3NQ/6d59nEc +83AmVz3/CQ1gtR9ii35HlR5jDkHUasbo+s5ggNaMrlg46CwKgGLG/hpOhMdJdU4cr/L EFGXGo4pWnfVhl/VUQVZTISnw1v/Vf2XZYanHhlp600Qvz6xULlIlGJW8gYO8LV/n02C 9KkLo8KQCx5eLnev2LY8z4GP9vzSNQl4QSkYCKwk+ISnPxr0V0qL+yUrFQjcbI5wHm3L lIk0RjZBx6fhWxPkDrPkvRp3r4lKXoub/XlxS+ou1oOorke4K5OytaVLUVmkqkXLZ40G Y/Qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sz4OfX2JcpPtJYKWU9aAlMNGI1f4lYPUyryiQe7SsD4=; b=AMs+j3LepwMygiYoT8iciGfFPL6p4Q6MfYcxnsU0wejiVoiMybY1W2WjD/SFGGSozo rJIMPaXTEYaK3hxAcwL27YgZrVKjtnYyrOi/w+SDDgO77YXn0CD5bzZ6f849fXN2KhvI zRAHrj/a9UqqQ7wfxWhmw9mVngY0lkW7mXyVJ3rVLJoYa00bOigygscQWyLL0NO2maWt jxDylJJI4MnMqeKaaBKOy6AxSOwEJrwLn82fWb9Y6JvHkTmtrb0NSrlirIZ4Kx3/Ct6g NXdjeR5PFDTGNI2ZNBETX1D/VB4BeXXXDlACltlGUGOoz/LYvQsaaJ9ae/36enlzOMlT yFsQ== X-Gm-Message-State: AOAM531KhdZ1w/JiK0qQcWpcoj2Yw3TCgYlz9bOn12I/giVCyOH1gyQ5 h4FPNEna3fLAI8PgqDXJZr7osUr08Wd3y35L X-Google-Smtp-Source: ABdhPJwcZqqSf72/6QqeE1S2+mdmBOF2C151zJzza77NgDP/scOQ2kv8Tq2dLHIt/9cedQ6ECq1kaA== X-Received: by 2002:a05:6830:1092:: with SMTP id y18mr1759959oto.243.1607450515195; Tue, 08 Dec 2020 10:01:55 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id k20sm3886805oig.35.2020.12.08.10.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Dec 2020 10:01:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 18/24] target/arm: Use finalize_memop for aa64 fpr load/store Date: Tue, 8 Dec 2020 12:01:12 -0600 Message-Id: <20201208180118.157911-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201208180118.157911-1-richard.henderson@linaro.org> References: <20201208180118.157911-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::342; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x342.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" For 128-bit load/store, use 16-byte alignment. This requires that we perform the two operations in the correct order so that we generate the alignment fault before modifying memory. Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 42 +++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 16 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d34ec892c6..152a0a37ab 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -957,25 +957,33 @@ static void do_gpr_ld(DisasContext *s, TCGv_i64 dest, TCGv_i64 tcg_addr, static void do_fp_st(DisasContext *s, int srcidx, TCGv_i64 tcg_addr, int size) { /* This writes the bottom N bits of a 128 bit wide vector to memory */ - TCGv_i64 tmp = tcg_temp_new_i64(); - tcg_gen_ld_i64(tmp, cpu_env, fp_reg_offset(s, srcidx, MO_64)); + TCGv_i64 tmplo = tcg_temp_new_i64(); + MemOp mop; + + tcg_gen_ld_i64(tmplo, cpu_env, fp_reg_offset(s, srcidx, MO_64)); + if (size < 4) { - tcg_gen_qemu_st_i64(tmp, tcg_addr, get_mem_index(s), - s->be_data + size); + mop = finalize_memop(s, size); + tcg_gen_qemu_st_i64(tmplo, tcg_addr, get_mem_index(s), mop); } else { bool be = s->be_data == MO_BE; TCGv_i64 tcg_hiaddr = tcg_temp_new_i64(); + TCGv_i64 tmphi = tcg_temp_new_i64(); + tcg_gen_ld_i64(tmphi, cpu_env, fp_reg_hi_offset(s, srcidx)); + + mop = s->be_data | MO_Q; + tcg_gen_qemu_st_i64(be ? tmphi : tmplo, tcg_addr, get_mem_index(s), + mop | (s->align_mem ? MO_ALIGN_16 : 0)); tcg_gen_addi_i64(tcg_hiaddr, tcg_addr, 8); - tcg_gen_qemu_st_i64(tmp, be ? tcg_hiaddr : tcg_addr, get_mem_index(s), - s->be_data | MO_Q); - tcg_gen_ld_i64(tmp, cpu_env, fp_reg_hi_offset(s, srcidx)); - tcg_gen_qemu_st_i64(tmp, be ? tcg_addr : tcg_hiaddr, get_mem_index(s), - s->be_data | MO_Q); + tcg_gen_qemu_st_i64(be ? tmplo : tmphi, tcg_hiaddr, + get_mem_index(s), mop); + tcg_temp_free_i64(tcg_hiaddr); + tcg_temp_free_i64(tmphi); } - tcg_temp_free_i64(tmp); + tcg_temp_free_i64(tmplo); } /* @@ -986,10 +994,11 @@ static void do_fp_ld(DisasContext *s, int destidx, TCGv_i64 tcg_addr, int size) /* This always zero-extends and writes to a full 128 bit wide vector */ TCGv_i64 tmplo = tcg_temp_new_i64(); TCGv_i64 tmphi = NULL; + MemOp mop; if (size < 4) { - MemOp memop = s->be_data + size; - tcg_gen_qemu_ld_i64(tmplo, tcg_addr, get_mem_index(s), memop); + mop = finalize_memop(s, size); + tcg_gen_qemu_ld_i64(tmplo, tcg_addr, get_mem_index(s), mop); } else { bool be = s->be_data == MO_BE; TCGv_i64 tcg_hiaddr; @@ -997,11 +1006,12 @@ static void do_fp_ld(DisasContext *s, int destidx, TCGv_i64 tcg_addr, int size) tmphi = tcg_temp_new_i64(); tcg_hiaddr = tcg_temp_new_i64(); + mop = s->be_data | MO_Q; + tcg_gen_qemu_ld_i64(be ? tmphi : tmplo, tcg_addr, get_mem_index(s), + mop | (s->align_mem ? MO_ALIGN_16 : 0)); tcg_gen_addi_i64(tcg_hiaddr, tcg_addr, 8); - tcg_gen_qemu_ld_i64(tmplo, be ? tcg_hiaddr : tcg_addr, get_mem_index(s), - s->be_data | MO_Q); - tcg_gen_qemu_ld_i64(tmphi, be ? tcg_addr : tcg_hiaddr, get_mem_index(s), - s->be_data | MO_Q); + tcg_gen_qemu_ld_i64(be ? tmplo : tmphi, tcg_hiaddr, + get_mem_index(s), mop); tcg_temp_free_i64(tcg_hiaddr); } -- 2.25.1