From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH 00/13] target/mips: Convert LSA/DLSA and part of the Rel6 removed opcodes
Date: Tue, 8 Dec 2020 21:36:51 +0100 [thread overview]
Message-ID: <20201208203704.243704-1-f4bug@amsat.org> (raw)
Complete the MSA conversion with the LSA/DLSA opcodes,
which are shared with the Release 6.
Keep going converting the removed opcodes.
We now have 2 decoders on 32-bit, and 4 on 64-bit.
Extensions are decoded first, then ISA.
I might introduce a macro to have a generic decode()
function to hide the 32/64 check, to keep the main
decode_opc() loop easy to review.
Series available here:
https://gitlab.com/philmd/qemu/-/tree/mips_decodetree_lsa_r6
Regards,
Phil.
Philippe Mathieu-Daudé (13):
!fixup "target/mips/translate: Add declarations for generic code"
target/mips: Extract LSA/DLSA translation generators
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes
target/mips: Introduce decodetree helpers for Release6 LSA/DLSA
opcodes
target/mips: Remove now unreachable LSA/DLSA opcodes code
target/mips: Convert Rel6 Special2 opcode to decodetree
target/mips: Convert Rel6 COP1X opcode to decodetree
target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree
target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree
target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree
target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree
target/mips: Convert Rel6 LLD/SCD opcodes to decodetree
target/mips: Convert Rel6 LL/SC opcodes to decodetree
target/mips/translate.h | 21 +++++-
target/mips/isa-mips32r6.decode | 36 ++++++++++
target/mips/isa-mips64r6.decode | 26 +++++++
target/mips/mod-msa32.decode | 4 ++
target/mips/mod-msa64.decode | 17 +++++
target/mips/isa-mips_rel6_translate.c | 40 +++++++++++
target/mips/mod-msa_translate.c | 15 ++++
target/mips/translate.c | 98 +++++++--------------------
target/mips/translate_addr_const.c | 54 +++++++++++++++
target/mips/meson.build | 9 +++
10 files changed, 245 insertions(+), 75 deletions(-)
create mode 100644 target/mips/isa-mips32r6.decode
create mode 100644 target/mips/isa-mips64r6.decode
create mode 100644 target/mips/mod-msa64.decode
create mode 100644 target/mips/isa-mips_rel6_translate.c
create mode 100644 target/mips/translate_addr_const.c
--
2.26.2
next reply other threads:[~2020-12-08 21:50 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 20:36 Philippe Mathieu-Daudé [this message]
2020-12-08 20:36 ` [PATCH 01/13] !fixup "target/mips/translate: Add declarations for generic code" Philippe Mathieu-Daudé
2020-12-09 0:09 ` Richard Henderson
2020-12-08 20:36 ` [PATCH 02/13] target/mips: Extract LSA/DLSA translation generators Philippe Mathieu-Daudé
2020-12-09 0:16 ` Richard Henderson
2020-12-08 20:36 ` [PATCH 03/13] target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes Philippe Mathieu-Daudé
2020-12-09 0:22 ` Richard Henderson
2020-12-09 14:14 ` Richard Henderson
2020-12-08 20:36 ` [PATCH 04/13] target/mips: Introduce decodetree helpers for Release6 " Philippe Mathieu-Daudé
2020-12-09 14:21 ` Richard Henderson
2020-12-08 20:36 ` [PATCH 05/13] target/mips: Remove now unreachable LSA/DLSA opcodes code Philippe Mathieu-Daudé
2020-12-09 14:22 ` Richard Henderson
2020-12-08 20:36 ` [PATCH 06/13] target/mips: Convert Rel6 Special2 opcode to decodetree Philippe Mathieu-Daudé
2020-12-09 14:23 ` Richard Henderson
2020-12-08 20:36 ` [PATCH 07/13] target/mips: Convert Rel6 COP1X " Philippe Mathieu-Daudé
2020-12-09 14:23 ` Richard Henderson
2020-12-08 20:36 ` [PATCH 08/13] target/mips: Convert Rel6 CACHE/PREF opcodes " Philippe Mathieu-Daudé
2020-12-09 14:24 ` Richard Henderson
2020-12-08 20:37 ` [PATCH 09/13] target/mips: Convert Rel6 LWL/LWR/SWL/SWR " Philippe Mathieu-Daudé
2020-12-09 14:24 ` Richard Henderson
2020-12-08 20:37 ` [PATCH 10/13] target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE " Philippe Mathieu-Daudé
2020-12-09 14:35 ` Richard Henderson
2020-12-08 20:37 ` [PATCH 11/13] target/mips: Convert Rel6 LDL/LDR/SDL/SDR " Philippe Mathieu-Daudé
2020-12-09 14:39 ` Richard Henderson
2020-12-08 20:37 ` [PATCH 12/13] target/mips: Convert Rel6 LLD/SCD " Philippe Mathieu-Daudé
2020-12-09 14:40 ` Richard Henderson
2020-12-08 20:37 ` [PATCH 13/13] target/mips: Convert Rel6 LL/SC " Philippe Mathieu-Daudé
2020-12-09 14:40 ` Richard Henderson
2021-01-07 18:48 ` [PATCH 00/13] target/mips: Convert LSA/DLSA and part of the Rel6 removed opcodes Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201208203704.243704-1-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=aleksandar.rikalo@syrmia.com \
--cc=aurelien@aurel32.net \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.