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From: "Huang, Sean Z" <sean.z.huang@intel.com>
To: Intel-gfx@lists.freedesktop.org
Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com>,
	Huang Sean Z <sean.z.huang@intel.com>,
	Kondapally Kalyan <kalyan.kondapally@intel.com>
Subject: [Intel-gfx] [RFC-v8 12/23] drm/i915/pxp: User interface for Protected buffer
Date: Fri, 11 Dec 2020 01:04:46 -0800	[thread overview]
Message-ID: <20201211090457.32674-13-sean.z.huang@intel.com> (raw)
In-Reply-To: <20201211090457.32674-1-sean.z.huang@intel.com>

From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>

This api allow user mode to create Protected buffer and context creation.

Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Cc: Telukuntla Sreedhar <sreedhar.telukuntla@intel.com>
Cc: Kondapally Kalyan <kalyan.kondapally@intel.com>
Cc: Gupta Anshuman <Anshuman.Gupta@intel.com>
Cc: Huang Sean Z <sean.z.huang@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 15 ++++++++++--
 drivers/gpu/drm/i915/gem/i915_gem_context.h   | 10 ++++++++
 .../gpu/drm/i915/gem/i915_gem_context_types.h |  2 +-
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |  5 ++++
 drivers/gpu/drm/i915/i915_gem.c               | 23 +++++++++++++++----
 include/uapi/drm/i915_drm.h                   | 19 +++++++++++++++
 6 files changed, 67 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index ad136d009d9b..56cf03cec355 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2061,12 +2061,23 @@ static int ctx_setparam(struct drm_i915_file_private *fpriv,
 	case I915_CONTEXT_PARAM_RECOVERABLE:
 		if (args->size)
 			ret = -EINVAL;
-		else if (args->value)
-			i915_gem_context_set_recoverable(ctx);
+		else if (args->value) {
+			if (!i915_gem_context_is_protected(ctx))
+				i915_gem_context_set_recoverable(ctx);
+			else
+				ret = -EPERM;
+			}
 		else
 			i915_gem_context_clear_recoverable(ctx);
 		break;
 
+	case I915_CONTEXT_PARAM_PROTECTED_CONTENT:
+		if (args->size)
+			ret = -EINVAL;
+		else if (args->value)
+			i915_gem_context_set_protected(ctx);
+		break;
+
 	case I915_CONTEXT_PARAM_PRIORITY:
 		ret = set_priority(ctx, args);
 		break;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index a133f92bbedb..5897e7ca11a8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -70,6 +70,16 @@ static inline void i915_gem_context_set_recoverable(struct i915_gem_context *ctx
 	set_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags);
 }
 
+static inline void i915_gem_context_set_protected(struct i915_gem_context *ctx)
+{
+	set_bit(UCONTEXT_PROTECTED, &ctx->user_flags);
+}
+
+static inline bool i915_gem_context_is_protected(struct i915_gem_context *ctx)
+{
+	return test_bit(UCONTEXT_PROTECTED, &ctx->user_flags);
+}
+
 static inline void i915_gem_context_clear_recoverable(struct i915_gem_context *ctx)
 {
 	clear_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index ae14ca24a11f..81ae94c2be86 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -135,7 +135,7 @@ struct i915_gem_context {
 #define UCONTEXT_BANNABLE		2
 #define UCONTEXT_RECOVERABLE		3
 #define UCONTEXT_PERSISTENCE		4
-
+#define UCONTEXT_PROTECTED		5
 	/**
 	 * @flags: small set of booleans
 	 */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index e2d9b7e1e152..90ac955463f4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -161,6 +161,11 @@ struct drm_i915_gem_object {
 	} mmo;
 
 	I915_SELFTEST_DECLARE(struct list_head st_link);
+	/**
+	 * @user_flags: small set of booleans set by the user
+	 */
+	unsigned long user_flags;
+#define I915_BO_PROTECTED     BIT(0)
 
 	unsigned long flags;
 #define I915_BO_ALLOC_CONTIGUOUS BIT(0)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 41698a823737..6a791fd24eaa 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -184,7 +184,8 @@ static int
 i915_gem_create(struct drm_file *file,
 		struct intel_memory_region *mr,
 		u64 *size_p,
-		u32 *handle_p)
+		u32 *handle_p,
+		u64 user_flags)
 {
 	struct drm_i915_gem_object *obj;
 	u32 handle;
@@ -204,6 +205,8 @@ i915_gem_create(struct drm_file *file,
 	if (IS_ERR(obj))
 		return PTR_ERR(obj);
 
+	obj->user_flags = user_flags;
+
 	ret = drm_gem_handle_create(file, &obj->base, &handle);
 	/* drop reference from allocate - handle holds it now */
 	i915_gem_object_put(obj);
@@ -258,11 +261,12 @@ i915_gem_dumb_create(struct drm_file *file,
 	return i915_gem_create(file,
 			       intel_memory_region_by_type(to_i915(dev),
 							   mem_type),
-			       &args->size, &args->handle);
+			       &args->size, &args->handle, 0);
 }
 
 struct create_ext {
-        struct drm_i915_private *i915;
+	struct drm_i915_private *i915;
+	unsigned long user_flags;
 };
 
 static int __create_setparam(struct drm_i915_gem_object_param *args,
@@ -273,6 +277,17 @@ static int __create_setparam(struct drm_i915_gem_object_param *args,
 		return -EINVAL;
 	}
 
+	switch (lower_32_bits(args->param)) {
+	case I915_PARAM_PROTECTED_CONTENT:
+		if (args->size) {
+			return -EINVAL;
+		} else if (args->data) {
+			ext_data->user_flags = args->data;
+			return 0;
+		}
+	break;
+	}
+
 	return -EINVAL;
 }
 
@@ -318,7 +333,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
 	return i915_gem_create(file,
 			       intel_memory_region_by_type(i915,
 							   INTEL_MEMORY_SYSTEM),
-			       &args->size, &args->handle);
+			       &args->size, &args->handle, ext_data.user_flags);
 }
 
 static int
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index e918ccc81c74..d6085a328b2c 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1715,6 +1715,15 @@ struct drm_i915_gem_context_param {
  * Default is 16 KiB.
  */
 #define I915_CONTEXT_PARAM_RINGSIZE	0xc
+
+/*
+ * I915_CONTEXT_PARAM_PROTECTED_CONTENT:
+ *
+ * If set to true (1) PAVP content protection is enabled.
+ * When enabled, the context is marked unrecoverable and may
+ * become invalid due to PAVP teardown event or other error.
+ */
+#define I915_CONTEXT_PARAM_PROTECTED_CONTENT    0xd
 /* Must be kept compact -- no holes and well documented */
 
 	__u64 value;
@@ -1734,6 +1743,16 @@ struct drm_i915_gem_object_param {
  */
 #define I915_OBJECT_PARAM  (1ull<<32)
 
+/*
+ * I915_PARAM_PROTECTED_CONTENT:
+ *
+ * If set to true (1) buffer contents is expected to be protected by
+ * PAVP encryption and requires decryption for scan out and processing.
+ * Protected buffers can only be used in PAVP protected contexts.
+ * A protected buffer may become invalid as a result of PAVP teardown.
+ */
+#define I915_PARAM_PROTECTED_CONTENT  0x1
+
 	__u64 param;
 
 	/* Data value or pointer */
-- 
2.17.1

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  parent reply	other threads:[~2020-12-11  9:05 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-11  9:04 [Intel-gfx] [RFC-v8 00/23] Introduce Intel PXP component - Mesa single session Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 01/23] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 02/23] drm/i915/pxp: set KCR reg init during the boot time Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 03/23] drm/i915/pxp: Implement funcs to create the TEE channel Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 04/23] drm/i915/pxp: Create the arbitrary session after boot Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 05/23] drm/i915/pxp: Func to send hardware session termination Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 06/23] drm/i915/pxp: Enable PXP irq worker and callback stub Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 07/23] drm/i915/pxp: Destroy arb session upon teardown Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 08/23] drm/i915/pxp: Enable PXP power management Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 09/23] drm/i915/pxp: Expose session state for display protection flip Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 10/23] mei: pxp: export pavp client to me client bus Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 11/23] drm/i915/uapi: introduce drm_i915_gem_create_ext Huang, Sean Z
2020-12-11  9:04 ` Huang, Sean Z [this message]
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 13/23] drm/i915/pxp: Add plane decryption support Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 14/23] drm/i915/pxp: Implement ioctl action to reserve session slots Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 15/23] drm/i915/pxp: Implement ioctl action to set session in play Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 16/23] drm/i915/pxp: Implement ioctl action to terminate the session Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 17/23] drm/i915/pxp: Implement ioctl action to send TEE commands Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 18/23] drm/i915/pxp: Implement ioctl action to query PXP tag Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 19/23] drm/i915/pxp: Termiante the session upon app crash Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 20/23] drm/i915/pxp: Add PXP-related registers into allowlist Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 21/23] mei: bus: add vtag support Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 22/23] mei: pxp: add vtag parameter to mei_pxp_send/receive interface Huang, Sean Z
2020-12-11  9:04 ` [Intel-gfx] [RFC-v8 23/23] drm/i915/pxp: Enable the PXP ioctl for protected session Huang, Sean Z
2020-12-11  9:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Intel PXP component - Mesa single session (rev8) Patchwork
2020-12-11  9:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-12-11 10:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-11 11:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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