From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC5D5C4361B for ; Tue, 15 Dec 2020 18:51:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BFE0822AAE for ; Tue, 15 Dec 2020 18:51:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730517AbgLOSv0 (ORCPT ); Tue, 15 Dec 2020 13:51:26 -0500 Received: from mail.kernel.org ([198.145.29.99]:50220 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730986AbgLOSvA (ORCPT ); Tue, 15 Dec 2020 13:51:00 -0500 Date: Tue, 15 Dec 2020 18:50:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1608058219; bh=MKgw43Ypee3WU7GugZbs2s0TT/yPlkdAlchXugo1lfI=; h=From:To:Cc:Subject:References:In-Reply-To:From; b=mEZWCgyLGFu/NwVira6zIssKDYsFZ1g2zNgWvAkbCIxsqmqusMrLfEevomUWXemo5 cpFvufPWYRZeY5x3qSVG3YewWvcCu8VgeE6ZhUr+smCfVHEtX0/ieOPrWHYxpIBnDu z3dPjzz5vFteDJNjRKbUL7cOthCMDOxGD817BYowyDuUmT59sJ5p+J/Xw2k20DsCS0 gbDurW2cgIaoK/3uKs5x8WoPDPByFaJFc3nEFmpPc/eUHQ1AEeBKg0lc9sRGlYsf/X 47Al/bb8QhvUP8NtJwBTbOalBrWp6zohe/pgrcsqgjc1p1tnjo92OMyvOp6LOTFDtl J9GBZDVgXqOxw== From: Will Deacon To: Peter Zijlstra Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Catalin Marinas , Marc Zyngier , Greg Kroah-Hartman , Morten Rasmussen , Qais Yousef , Suren Baghdasaryan , Quentin Perret , Tejun Heo , Li Zefan , Johannes Weiner , Ingo Molnar , Juri Lelli , Vincent Guittot , kernel-team@android.com Subject: Re: [PATCH v5 00/15] An alternative series for asymmetric AArch32 systems Message-ID: <20201215185012.GA15566@willie-the-truck> References: <20201208132835.6151-1-will@kernel.org> <20201215173645.GJ3040@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201215173645.GJ3040@hirez.programming.kicks-ass.net> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Peter, Cheers for taking a look. On Tue, Dec 15, 2020 at 06:36:45PM +0100, Peter Zijlstra wrote: > On Tue, Dec 08, 2020 at 01:28:20PM +0000, Will Deacon wrote: > > The aim of this series is to allow 32-bit ARM applications to run on > > arm64 SoCs where not all of the CPUs support the 32-bit instruction set. > > Unfortunately, such SoCs are real and will continue to be productised > > over the next few years at least. I can assure you that I'm not just > > doing this for fun. > > > > Changes in v5 include: > > > > * Teach cpuset_cpus_allowed() about task_cpu_possible_mask() so that > > we can avoid returning incompatible CPUs for a given task. This > > means that sched_setaffinity() can be used with larger masks (like > > the online mask) from userspace and also allows us to take into > > account the cpuset hierarchy when forcefully overriding the affinity > > for a task on execve(). > > > > * Honour task_cpu_possible_mask() when attaching a task to a cpuset, > > so that the resulting affinity mask does not contain any incompatible > > CPUs (since it would be rejected by set_cpus_allowed_ptr() otherwise). > > > > * Moved overriding of the affinity mask into the scheduler core rather > > than munge affinity masks directly in the architecture backend. > > Hurmph... so if I can still read, this thing will auto truncate the > affinity mask to something that only contains compatible CPUs, right? > > Assuming our system has 8 CPUs (0xFF), half of which are 32bit capable > (0x0F), then, when our native task (with affinity 0x3c) does a > fork()+execve() of a 32bit thingy the resulting task has 0x0c. > > If that in turn does fork()+execve() of a native task, it will retain > the trucated affinity mask (0x0c), instead of returning to the wider > mask (0x3c). > > IOW, any (accidental or otherwise) trip through a 32bit helper, will > destroy user state (the affinity mask: 0x3c). Yes, that's correct, and I agree that it's a rough edge. If you're happy with the idea of adding an extra mask to make this work, then I can start hacking that up (although I doubt I'll get something out before the new year at this point). > Should we perhaps split task_struct::cpus_mask, one to keep an original > copy of the user state, and one to be an effective cpumask for the task? > That way, the moment a task constricts or widens it's > task_cpu_possible_mask() we can re-compute the effective mask without > loss of information. Hmm, we might already have most of the pieces in place for this (modulo the extra field), since cpuset_cpus_allowed() provides the limiting mask now so this might be relatively straightforward. Famous last words... Will From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5739AC4361B for ; Tue, 15 Dec 2020 18:51:54 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1105E22AAE for ; Tue, 15 Dec 2020 18:51:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1105E22AAE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kmoXHkvMJV1YAYy58tFh8HiVB5+R7FOfLhI5uBXiK+c=; b=tRYxtoX/o6FmFuYZ0YQuW//bd /KHLZvpJNah5Km4Je+lZEMpWAvsb+MUGrOTLblVcKZ+GlkninKzV5OSfrb7expyogDaRRditJsp3Q egZiZVPPgO2Ru9Ri4v0j3xi1Ia4DjmoebhtgN/9IOyC29nerUv5lHt9gaSJLyWN1RkJTuzTCZZ4e9 OW0mR9CZO4rurDbHZ8vIbsGQdh0neJM8eR4kOrmT94Pc3u226vJrLBtVBOp728qdHLim/e1guM1NS vRfM11WSb1vZnn2/7OiUqMvJ9XbghyrCx0M9B5u2udU4xgv4iDSYl1WpeJIgJT8+k4phof/Kaff6o xtabzNMbA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpFOw-0007JO-Mt; Tue, 15 Dec 2020 18:50:22 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpFOu-0007IZ-DW for linux-arm-kernel@lists.infradead.org; Tue, 15 Dec 2020 18:50:21 +0000 Date: Tue, 15 Dec 2020 18:50:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1608058219; bh=MKgw43Ypee3WU7GugZbs2s0TT/yPlkdAlchXugo1lfI=; h=From:To:Cc:Subject:References:In-Reply-To:From; b=mEZWCgyLGFu/NwVira6zIssKDYsFZ1g2zNgWvAkbCIxsqmqusMrLfEevomUWXemo5 cpFvufPWYRZeY5x3qSVG3YewWvcCu8VgeE6ZhUr+smCfVHEtX0/ieOPrWHYxpIBnDu z3dPjzz5vFteDJNjRKbUL7cOthCMDOxGD817BYowyDuUmT59sJ5p+J/Xw2k20DsCS0 gbDurW2cgIaoK/3uKs5x8WoPDPByFaJFc3nEFmpPc/eUHQ1AEeBKg0lc9sRGlYsf/X 47Al/bb8QhvUP8NtJwBTbOalBrWp6zohe/pgrcsqgjc1p1tnjo92OMyvOp6LOTFDtl J9GBZDVgXqOxw== From: Will Deacon To: Peter Zijlstra Subject: Re: [PATCH v5 00/15] An alternative series for asymmetric AArch32 systems Message-ID: <20201215185012.GA15566@willie-the-truck> References: <20201208132835.6151-1-will@kernel.org> <20201215173645.GJ3040@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201215173645.GJ3040@hirez.programming.kicks-ass.net> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201215_135020_610083_7F3649AF X-CRM114-Status: GOOD ( 21.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Marc Zyngier , kernel-team@android.com, Vincent Guittot , Juri Lelli , Quentin Perret , Catalin Marinas , Johannes Weiner , linux-kernel@vger.kernel.org, Qais Yousef , Ingo Molnar , Li Zefan , Greg Kroah-Hartman , Tejun Heo , Suren Baghdasaryan , Morten Rasmussen , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Peter, Cheers for taking a look. On Tue, Dec 15, 2020 at 06:36:45PM +0100, Peter Zijlstra wrote: > On Tue, Dec 08, 2020 at 01:28:20PM +0000, Will Deacon wrote: > > The aim of this series is to allow 32-bit ARM applications to run on > > arm64 SoCs where not all of the CPUs support the 32-bit instruction set. > > Unfortunately, such SoCs are real and will continue to be productised > > over the next few years at least. I can assure you that I'm not just > > doing this for fun. > > > > Changes in v5 include: > > > > * Teach cpuset_cpus_allowed() about task_cpu_possible_mask() so that > > we can avoid returning incompatible CPUs for a given task. This > > means that sched_setaffinity() can be used with larger masks (like > > the online mask) from userspace and also allows us to take into > > account the cpuset hierarchy when forcefully overriding the affinity > > for a task on execve(). > > > > * Honour task_cpu_possible_mask() when attaching a task to a cpuset, > > so that the resulting affinity mask does not contain any incompatible > > CPUs (since it would be rejected by set_cpus_allowed_ptr() otherwise). > > > > * Moved overriding of the affinity mask into the scheduler core rather > > than munge affinity masks directly in the architecture backend. > > Hurmph... so if I can still read, this thing will auto truncate the > affinity mask to something that only contains compatible CPUs, right? > > Assuming our system has 8 CPUs (0xFF), half of which are 32bit capable > (0x0F), then, when our native task (with affinity 0x3c) does a > fork()+execve() of a 32bit thingy the resulting task has 0x0c. > > If that in turn does fork()+execve() of a native task, it will retain > the trucated affinity mask (0x0c), instead of returning to the wider > mask (0x3c). > > IOW, any (accidental or otherwise) trip through a 32bit helper, will > destroy user state (the affinity mask: 0x3c). Yes, that's correct, and I agree that it's a rough edge. If you're happy with the idea of adding an extra mask to make this work, then I can start hacking that up (although I doubt I'll get something out before the new year at this point). > Should we perhaps split task_struct::cpus_mask, one to keep an original > copy of the user state, and one to be an effective cpumask for the task? > That way, the moment a task constricts or widens it's > task_cpu_possible_mask() we can re-compute the effective mask without > loss of information. Hmm, we might already have most of the pieces in place for this (modulo the extra field), since cpuset_cpus_allowed() provides the limiting mask now so this might be relatively straightforward. Famous last words... Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel