From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Luca Ceresoli <luca@lucaceresoli.net>,
Adam Ford <aford173@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH] dt-bindings: clk: versaclock5: Miscellaneous fixes and improvements:
Date: Wed, 16 Dec 2020 15:52:31 +0100 [thread overview]
Message-ID: <20201216145231.1344317-1-geert+renesas@glider.be> (raw)
- Add reference to clock.yaml, and switch to unevaluatedProperties, to
stop complaining about the presence of "assigned-clock-rates" and
"assigned-clocks" in board DTS files,
- Fix typo in "idt,voltage-microvolts" property name, to match example
and driver code,
- Add missing reference for "idt,voltage-microvolts",
- Add missing "additionalProperties: false" for subnodes, to catch
typos in properties,
- There is no reason to wrap the (single) if condition in an allOf
block,
- Fix obsolete property names in example.
Fixes: 45c940184b501fc6 ("dt-bindings: clk: versaclock5: convert to yaml")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Notes:
1. The use of "idt,voltage-microvolts" (with trailing S) is a bit
unfortunate, as Documentation/devicetree/bindings/property-units.txt
suggests to not have the trailing edge.
Can we still fix the driver and bindings? While this entered
uptstream in v5.9, there are no users in next-20201216.
2. Due to "clock-output-names" being part of
dt-schema/schemas/clock/clock.yaml, the presence of this property
does not trigger an error. Adding "clock-output-names: false"
can fix that. But given this property is deprecated, except for
very specific use cases, explicitly allowing it for those few use
cases would be better.
---
.../bindings/clock/idt,versaclock5.yaml | 53 ++++++++++---------
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
index 2ac1131fd9222a86..14851e76f6342095 100644
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
@@ -33,6 +33,9 @@ description: |
maintainers:
- Luca Ceresoli <luca@lucaceresoli.net>
+allOf:
+ - $ref: clock.yaml#
+
properties:
compatible:
enum:
@@ -73,40 +76,42 @@ patternProperties:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 6
- idt,voltage-microvolt:
+ idt,voltage-microvolts:
description: The output drive voltage.
+ $ref: /schemas/types.yaml#/definitions/uint32
enum: [ 1800000, 2500000, 3300000 ]
idt,slew-percent:
description: The Slew rate control for CMOS single-ended.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 80, 85, 90, 100 ]
+ additionalProperties: false
+
required:
- compatible
- reg
- '#clock-cells'
-allOf:
- - if:
- properties:
- compatible:
- enum:
- - idt,5p49v5933
- - idt,5p49v5935
- then:
- # Devices with builtin crystal + optional external input
- properties:
- clock-names:
- const: clkin
- clocks:
- maxItems: 1
- else:
- # Devices without builtin crystal
- required:
- - clock-names
- - clocks
-
-additionalProperties: false
+if:
+ properties:
+ compatible:
+ enum:
+ - idt,5p49v5933
+ - idt,5p49v5935
+then:
+ # Devices with builtin crystal + optional external input
+ properties:
+ clock-names:
+ const: clkin
+ clocks:
+ maxItems: 1
+else:
+ # Devices without builtin crystal
+ required:
+ - clock-names
+ - clocks
+
+unevaluatedProperties: false
examples:
- |
@@ -135,13 +140,13 @@ examples:
clock-names = "xin";
OUT1 {
- idt,drive-mode = <VC5_CMOSD>;
+ idt,mode = <VC5_CMOSD>;
idt,voltage-microvolts = <1800000>;
idt,slew-percent = <80>;
};
OUT4 {
- idt,drive-mode = <VC5_LVDS>;
+ idt,mode = <VC5_LVDS>;
};
};
};
--
2.25.1
next reply other threads:[~2020-12-16 14:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-16 14:52 Geert Uytterhoeven [this message]
2020-12-17 23:59 ` [PATCH] dt-bindings: clk: versaclock5: Miscellaneous fixes and improvements: Rob Herring
2020-12-18 11:42 ` Geert Uytterhoeven
2020-12-18 22:32 ` Rob Herring
2020-12-20 10:24 ` Geert Uytterhoeven
2020-12-21 17:21 ` Rob Herring
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