From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE3BCC4361B for ; Wed, 16 Dec 2020 22:00:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8BAE623788 for ; Wed, 16 Dec 2020 22:00:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729986AbgLPWAc (ORCPT ); Wed, 16 Dec 2020 17:00:32 -0500 Received: from mga05.intel.com ([192.55.52.43]:8298 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729966AbgLPWAc (ORCPT ); Wed, 16 Dec 2020 17:00:32 -0500 IronPort-SDR: tAsTYMUp6MhYDV4v4nbITbnktxA7zzub86sK4hj2rTphr+PgXJ3TBPZzM8r2baUGYHE+LEbETp pAy2GNATjVUQ== X-IronPort-AV: E=McAfee;i="6000,8403,9837"; a="259868418" X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="259868418" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2020 13:58:46 -0800 IronPort-SDR: g6StFyQyNI6oqus3+ogWUBPUnZzHoq6z1zKSGaGYnEB/jpQHAqtKlwbg+pLHIYu61oTWezrZ+O //vTJhsbLJBA== X-IronPort-AV: E=Sophos;i="5.78,425,1599548400"; d="scan'208";a="379412408" Received: from paasikivi.fi.intel.com ([10.237.72.42]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Dec 2020 13:58:42 -0800 Received: by paasikivi.fi.intel.com (Postfix, from userid 1000) id F2B6820726; Wed, 16 Dec 2020 23:58:40 +0200 (EET) Date: Wed, 16 Dec 2020 23:58:40 +0200 From: Sakari Ailus To: Laurent Pinchart Cc: Rob Herring , Guennadi Liakhovetski , Maxime Ripard , Mauro Carvalho Chehab , Jacopo Mondi , Laurent Pinchart , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Subject: Re: [PATCH v3 1/2] media: dt-bindings: Convert video-interfaces.txt properties to schemas Message-ID: <20201216215840.GM26370@paasikivi.fi.intel.com> References: <20201210211625.3070388-1-robh@kernel.org> <20201210211625.3070388-5-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Laurent, On Wed, Dec 16, 2020 at 04:52:20PM +0200, Laurent Pinchart wrote: > > + clock-lanes: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + # Assume up to 9 physical lane indices > > + maximum: 8 > > + description: > > + Physical clock lane index. Position of an entry determines > > s/index/indexes/ (or indices) as there are potentially multiple entries > (even if in practice, for all bus types we currently support, only one > clock lane is supported) ? We could easily change it if that appears. The property was named in plural to align with data-lanes, without intention of having more clock lanes. We could of course allow more if that happens, but I doubt it. -- Sakari Ailus