From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dario Binacchi Date: Thu, 24 Dec 2020 08:34:02 +0100 Subject: [PATCH v7 24/28] video: omap: drop domain clock enabling by SOC api In-Reply-To: <20201224073406.16764-15-dariobin@libero.it> References: <20201224073406.16764-15-dariobin@libero.it> Message-ID: <20201224073406.16764-25-dariobin@libero.it> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Enabling the domain clock is performed by the sysc interconnect target module driver during the video device probing. Signed-off-by: Dario Binacchi --- (no changes since v3) Changes in v3: - Remove clock domain enabling/disabling. - Update the commit message. arch/arm/mach-omap2/am33xx/clock_am33xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c b/arch/arm/mach-omap2/am33xx/clock_am33xx.c index 2427933c8b..cf71192360 100644 --- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c +++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c @@ -226,7 +226,7 @@ void enable_basic_clocks(void) &cmper->usb0clkctrl, &cmper->emiffwclkctrl, &cmper->emifclkctrl, -#if CONFIG_IS_ENABLED(AM335X_LCD) +#if CONFIG_IS_ENABLED(AM335X_LCD) && !CONFIG_IS_ENABLED(DM_VIDEO) &cmper->lcdclkctrl, &cmper->lcdcclkstctrl, #endif -- 2.17.1