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From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: linux-renesas-soc@vger.kernel.org
Cc: Geert Uytterhoeven <geert@linux-m68k.org>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>
Subject: [RFC PATCH] arm64: dts: r8a779a0: correct reset values for GPIO
Date: Sun, 27 Dec 2020 13:19:25 +0100	[thread overview]
Message-ID: <20201227121925.8431-1-wsa+renesas@sang-engineering.com> (raw)

Because the datasheet is ambigious, copy over the reset values from the
latest BSP.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---

While looking for a problem when obtaining the reset GPIO for RAVB, I
noticed this difference and so send this patch as a notification. It
sadly did not fix my RAVB problem, so I'll report it with the RAVB
patches there. I didn't find a map from "pfc-clocks" to "GPIO block"
yet, so this is all very confusing without it.

 arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 2c7bb1503cda..16c64ec548df 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -110,7 +110,7 @@ gpio0: gpio@e6058180 {
 			interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 916>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 916>;
+			resets =  <&cpg 1331>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 0 28>;
@@ -124,7 +124,7 @@ gpio1: gpio@e6050180 {
 			interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 915>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 915>;
+			resets =  <&cpg 1330>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 32 31>;
@@ -138,7 +138,7 @@ gpio2: gpio@e6050980 {
 			interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 915>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 915>;
+			resets =  <&cpg 1330>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 64 25>;
@@ -152,7 +152,7 @@ gpio3: gpio@e6058980 {
 			interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 916>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 916>;
+			resets =  <&cpg 1331>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 96 17>;
@@ -166,7 +166,7 @@ gpio4: gpio@e6060180 {
 			interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 917>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 917>;
+			resets =  <&cpg 1400>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 128 27>;
@@ -180,7 +180,7 @@ gpio5: gpio@e6060980 {
 			interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 917>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 917>;
+			resets =  <&cpg 1400>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 160 21>;
@@ -194,7 +194,7 @@ gpio6: gpio@e6068180 {
 			interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 918>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 918>;
+			resets =  <&cpg 1401>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 192 21>;
@@ -208,7 +208,7 @@ gpio7: gpio@e6068980 {
 			interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 918>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 918>;
+			resets =  <&cpg 1401>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 224 21>;
@@ -222,7 +222,7 @@ gpio8: gpio@e6069180 {
 			interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 918>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 918>;
+			resets =  <&cpg 1401>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 256 21>;
@@ -236,7 +236,7 @@ gpio9: gpio@e6069980 {
 			interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 918>;
 			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-			resets =  <&cpg 918>;
+			resets =  <&cpg 1401>;
 			gpio-controller;
 			#gpio-cells = <2>;
 			// gpio-ranges = <&pfc 0 288 21>;
-- 
2.29.2


             reply	other threads:[~2020-12-27 12:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-27 12:19 Wolfram Sang [this message]
2021-01-05 12:19 ` [RFC PATCH] arm64: dts: r8a779a0: correct reset values for GPIO Geert Uytterhoeven
2021-01-08  9:06   ` Geert Uytterhoeven
2021-01-08  9:42     ` Wolfram Sang

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