On Mon, Dec 21, 2020 at 05:54:48PM +0100, Ulrich Hecht wrote:
> This patch adds SCIF0, 1, 3 and 4 pins, groups and functions for the
> R8A779A0 (V3U) SoC.
> 
> Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for SCIF0 and SCIF_CLK