From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B90D4C433DB for ; Wed, 30 Dec 2020 17:34:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6B6ED20782 for ; Wed, 30 Dec 2020 17:34:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726680AbgL3Rdv (ORCPT ); Wed, 30 Dec 2020 12:33:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726168AbgL3Rdu (ORCPT ); Wed, 30 Dec 2020 12:33:50 -0500 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 389F0C061573 for ; Wed, 30 Dec 2020 09:33:10 -0800 (PST) Received: from zn.tnic (p200300ec2f0ae900b929ac10dfcb3199.dip0.t-ipconnect.de [IPv6:2003:ec:2f0a:e900:b929:ac10:dfcb:3199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 6DF171EC04EF; Wed, 30 Dec 2020 18:33:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1609349588; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=rO9syfStUEfHNv7W5nzX2+XmAelNVPGS6C6pYWHTnt8=; b=Mrn2ft5i8pm39vjj4DiU0/t1ZV+aTF9hTSTCFt+WnrZ608Q7gP+mO8H6rnMNUyhcXDyYcB JfEKVRzqtNx/u1To/C+R9JheRfOHTdf71wq1Q/iCfJajcACvya4C6RWhvL7A3QB0pT82iB Is30uzSuJjbMgADV67ZRhGzRPGRASW4= Date: Wed, 30 Dec 2020 18:33:05 +0100 From: Borislav Petkov To: shuo.a.liu@intel.com Cc: linux-kernel@vger.kernel.org, x86@kernel.org, Greg Kroah-Hartman , "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , Sean Christopherson , Yu Wang , Reinette Chatre , Yakui Zhao , Nick Desaulniers , Dave Hansen , Dan Williams , Fengwei Yin , Zhi Wang , Zhenyu Wang , Arvind Sankar , Peter Zijlstra , Segher Boessenkool Subject: Re: [PATCH v6 04/18] x86/acrn: Introduce hypercall interfaces Message-ID: <20201230173305.GF22022@zn.tnic> References: <20201201093853.12070-1-shuo.a.liu@intel.com> <20201201093853.12070-5-shuo.a.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201201093853.12070-5-shuo.a.liu@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Dec 01, 2020 at 05:38:39PM +0800, shuo.a.liu@intel.com wrote: > From: Shuo Liu > > The Service VM communicates with the hypervisor via conventional > hypercalls. VMCALL instruction is used to make the hypercalls. > > ACRN hypercall ABI: > * Hypercall number is in R8 register. > * Up to 2 parameters are in RDI and RSI registers. > * Return value is in RAX register. > > Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8 > register as direct register constraints, use supported constraint as > input with a explicit MOV to R8 in beginning of asm. > > Originally-by: Yakui Zhao > Signed-off-by: Shuo Liu > Reviewed-by: Reinette Chatre > Reviewed-by: Nick Desaulniers > Cc: Dave Hansen > Cc: Sean Christopherson > Cc: Dan Williams > Cc: Fengwei Yin > Cc: Zhi Wang > Cc: Zhenyu Wang > Cc: Yu Wang > Cc: Reinette Chatre > Cc: Greg Kroah-Hartman > Cc: Borislav Petkov > Cc: Arvind Sankar > Cc: Peter Zijlstra > Cc: Nick Desaulniers > Cc: Segher Boessenkool > --- > arch/x86/include/asm/acrn.h | 54 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) The x86 bits in patches 2-4 look ok now, thanks! Acked-by: Borislav Petkov -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette