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From: David Gibson <david@gibson.dropbear.id.au>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: thuth@redhat.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v2 4/7] mac_newworld: delay wiring of PCI IRQs in New World machine
Date: Thu, 31 Dec 2020 17:44:11 +1100	[thread overview]
Message-ID: <20201231064411.GA25471@yekko.fritz.box> (raw)
In-Reply-To: <20201229175619.6051-5-mark.cave-ayland@ilande.co.uk>

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On Tue, Dec 29, 2020 at 05:56:16PM +0000, Mark Cave-Ayland wrote:
> In order to move the OpenPIC device to the macio device, the PCI bus needs to be
> initialised before the macio device and also before wiring the OpenPIC IRQs.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  hw/ppc/mac_newworld.c | 46 ++++++++++++++++++++++++-------------------
>  1 file changed, 26 insertions(+), 20 deletions(-)
> 
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index c0accda592..708bb2f1ab 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -139,6 +139,7 @@ static void ppc_core99_init(MachineState *machine)
>      int machine_arch;
>      SysBusDevice *s;
>      DeviceState *dev, *pic_dev;
> +    DeviceState *uninorth_internal_dev = NULL, *uninorth_agp_dev = NULL;
>      hwaddr nvram_addr = 0xFFF04000;
>      uint64_t tbfreq;
>      unsigned int smp_cpus = machine->smp.cpus;
> @@ -320,35 +321,24 @@ static void ppc_core99_init(MachineState *machine)
>          sysbus_mmio_map(s, 0, 0xf0800000);
>          sysbus_mmio_map(s, 1, 0xf0c00000);
>  
> -        for (i = 0; i < 4; i++) {
> -            qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
> -        }
> -
>          machine_arch = ARCH_MAC99_U3;
>      } else {
>          /* Use values found on a real PowerMac */
>          /* Uninorth AGP bus */
> -        dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
> -        s = SYS_BUS_DEVICE(dev);
> +        uninorth_agp_dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
> +        s = SYS_BUS_DEVICE(uninorth_agp_dev);
>          sysbus_realize_and_unref(s, &error_fatal);
>          sysbus_mmio_map(s, 0, 0xf0800000);
>          sysbus_mmio_map(s, 1, 0xf0c00000);
>  
> -        for (i = 0; i < 4; i++) {
> -            qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
> -        }
> -
>          /* Uninorth internal bus */
> -        dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
> -        s = SYS_BUS_DEVICE(dev);
> +        uninorth_internal_dev = qdev_new(
> +                                TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
> +        s = SYS_BUS_DEVICE(uninorth_internal_dev);
>          sysbus_realize_and_unref(s, &error_fatal);
>          sysbus_mmio_map(s, 0, 0xf4800000);
>          sysbus_mmio_map(s, 1, 0xf4c00000);
>  
> -        for (i = 0; i < 4; i++) {
> -            qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
> -        }
> -
>          /* Uninorth main bus */
>          dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
>          qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
> @@ -364,10 +354,6 @@ static void ppc_core99_init(MachineState *machine)
>          sysbus_mmio_map(s, 0, 0xf2800000);
>          sysbus_mmio_map(s, 1, 0xf2c00000);
>  
> -        for (i = 0; i < 4; i++) {
> -            qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
> -        }
> -
>          machine_arch = ARCH_MAC99;
>      }
>  
> @@ -401,6 +387,26 @@ static void ppc_core99_init(MachineState *machine)
>  
>      pci_realize_and_unref(macio, pci_bus, &error_fatal);
>  
> +    for (i = 0; i < 4; i++) {
> +        qdev_connect_gpio_out(DEVICE(uninorth_pci), i,
> +                              qdev_get_gpio_in(pic_dev, 0x1b + i));
> +    }
> +
> +    /* TODO: additional PCI buses only wired up for 32-bit machines */
> +    if (PPC_INPUT(env) != PPC_FLAGS_INPUT_970) {
> +        /* Uninorth AGP bus */
> +        for (i = 0; i < 4; i++) {
> +            qdev_connect_gpio_out(uninorth_agp_dev, i,
> +                                  qdev_get_gpio_in(pic_dev, 0x1b + i));
> +        }
> +
> +        /* Uninorth internal bus */
> +        for (i = 0; i < 4; i++) {
> +            qdev_connect_gpio_out(uninorth_internal_dev, i,
> +                                  qdev_get_gpio_in(pic_dev, 0x1b + i));
> +        }
> +    }
> +
>      /* We only emulate 2 out of 3 IDE controllers for now */
>      ide_drive_get(hd, ARRAY_SIZE(hd));
>  

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2020-12-31  7:24 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-29 17:56 [PATCH v2 0/7] macio: remove PIC object property links Mark Cave-Ayland
2020-12-29 17:56 ` [PATCH v2 1/7] mac_oldworld: remove duplicate bus check for PPC_INPUT(env) Mark Cave-Ayland
2020-12-29 17:56 ` [PATCH v2 2/7] mac_oldworld: move initialisation of grackle before heathrow Mark Cave-Ayland
2020-12-30  1:25   ` David Gibson
2020-12-29 17:56 ` [PATCH v2 3/7] macio: move heathrow PIC inside macio-oldworld device Mark Cave-Ayland
2020-12-30  1:36   ` David Gibson
2020-12-29 17:56 ` [PATCH v2 4/7] mac_newworld: delay wiring of PCI IRQs in New World machine Mark Cave-Ayland
2020-12-31  6:44   ` David Gibson [this message]
2020-12-29 17:56 ` [PATCH v2 5/7] macio: move OpenPIC inside macio-newworld device Mark Cave-Ayland
2020-12-31  6:48   ` David Gibson
2020-12-29 17:56 ` [PATCH v2 6/7] macio: wire macio GPIOs to OpenPIC using sysbus IRQs Mark Cave-Ayland
2020-12-29 17:56 ` [PATCH v2 7/7] macio: don't set user_creatable to false Mark Cave-Ayland
2021-01-07 14:26 ` [PATCH v2 0/7] macio: remove PIC object property links Mark Cave-Ayland
2021-01-07 23:24   ` David Gibson

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