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Thu, 31 Dec 2020 10:14:30 -0800 (PST) Received: from robh.at.kernel.org ([64.188.179.253]) by smtp.gmail.com with ESMTPSA id f25sm11148595oou.39.2020.12.31.10.14.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Dec 2020 10:14:28 -0800 (PST) Received: (nullmailer pid 2077595 invoked by uid 1000); Thu, 31 Dec 2020 18:14:25 -0000 Date: Thu, 31 Dec 2020 11:14:25 -0700 From: Rob Herring To: Martin Blumenstingl Cc: linux-remoteproc@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, bjorn.andersson@linaro.org, ohad@wizery.com Subject: Re: [PATCH 2/5] dt-bindings: Amlogic: add the documentation for the SECBUS2 registers Message-ID: <20201231181425.GA2075418@robh.at.kernel.org> References: <20201230012724.1326156-1-martin.blumenstingl@googlemail.com> <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org On Wed, Dec 30, 2020 at 02:27:21AM +0100, Martin Blumenstingl wrote: > The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > contains registers for various IP blocks such as pin-controller bits for > the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > The registers can be accessed directly when not running in "secure mode". > When "secure mode" is enabled then these registers have to be accessed > through secure monitor calls. > > So far these SoCs are always known to boot in "non-secure mode". > Add a binding documentation using syscon (as these registers are shared > across different IPs) for the SECBUS2 registers. > > Signed-off-by: Martin Blumenstingl > --- > .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > > diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > new file mode 100644 > index 000000000000..cfa8e9de6c28 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface > + > +maintainers: > + - Martin Blumenstingl > + > +description: | > + The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > + contains registers for various IP blocks such as pin-controller bits for > + the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > + The registers can be accessed directly when not running in "secure mode". > + When "secure mode" is enabled then these registers have to be accessed > + through secure monitor calls. > + > +# We need a select here so we don't match all nodes with 'syscon' No, you don't. The default 'select' will ignore 'syscon' and 'simple-mfd'. > +select: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + required: > + - compatible > + > +properties: > + compatible: > + items: > + - enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + - const: syscon > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + secbus2: system-controller@4000 { > + compatible = "amlogic,meson8-secbus2", "syscon"; > + reg = <0x4000 0x2000>; > + }; > -- > 2.30.0 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2241EC433E0 for ; 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Thu, 31 Dec 2020 18:14:25 -0000 Date: Thu, 31 Dec 2020 11:14:25 -0700 From: Rob Herring To: Martin Blumenstingl Subject: Re: [PATCH 2/5] dt-bindings: Amlogic: add the documentation for the SECBUS2 registers Message-ID: <20201231181425.GA2075418@robh.at.kernel.org> References: <20201230012724.1326156-1-martin.blumenstingl@googlemail.com> <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201231_131432_242523_B84EF594 X-CRM114-Status: GOOD ( 19.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ohad@wizery.com, devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Dec 30, 2020 at 02:27:21AM +0100, Martin Blumenstingl wrote: > The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > contains registers for various IP blocks such as pin-controller bits for > the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > The registers can be accessed directly when not running in "secure mode". > When "secure mode" is enabled then these registers have to be accessed > through secure monitor calls. > > So far these SoCs are always known to boot in "non-secure mode". > Add a binding documentation using syscon (as these registers are shared > across different IPs) for the SECBUS2 registers. > > Signed-off-by: Martin Blumenstingl > --- > .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > > diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > new file mode 100644 > index 000000000000..cfa8e9de6c28 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface > + > +maintainers: > + - Martin Blumenstingl > + > +description: | > + The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > + contains registers for various IP blocks such as pin-controller bits for > + the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > + The registers can be accessed directly when not running in "secure mode". > + When "secure mode" is enabled then these registers have to be accessed > + through secure monitor calls. > + > +# We need a select here so we don't match all nodes with 'syscon' No, you don't. The default 'select' will ignore 'syscon' and 'simple-mfd'. > +select: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + required: > + - compatible > + > +properties: > + compatible: > + items: > + - enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + - const: syscon > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + secbus2: system-controller@4000 { > + compatible = "amlogic,meson8-secbus2", "syscon"; > + reg = <0x4000 0x2000>; > + }; > -- > 2.30.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EACB9C433DB for ; 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Thu, 31 Dec 2020 18:14:25 -0000 Date: Thu, 31 Dec 2020 11:14:25 -0700 From: Rob Herring To: Martin Blumenstingl Subject: Re: [PATCH 2/5] dt-bindings: Amlogic: add the documentation for the SECBUS2 registers Message-ID: <20201231181425.GA2075418@robh.at.kernel.org> References: <20201230012724.1326156-1-martin.blumenstingl@googlemail.com> <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201230012724.1326156-3-martin.blumenstingl@googlemail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201231_131432_242523_B84EF594 X-CRM114-Status: GOOD ( 19.23 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ohad@wizery.com, devicetree@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Wed, Dec 30, 2020 at 02:27:21AM +0100, Martin Blumenstingl wrote: > The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > contains registers for various IP blocks such as pin-controller bits for > the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > The registers can be accessed directly when not running in "secure mode". > When "secure mode" is enabled then these registers have to be accessed > through secure monitor calls. > > So far these SoCs are always known to boot in "non-secure mode". > Add a binding documentation using syscon (as these registers are shared > across different IPs) for the SECBUS2 registers. > > Signed-off-by: Martin Blumenstingl > --- > .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > > diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > new file mode 100644 > index 000000000000..cfa8e9de6c28 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface > + > +maintainers: > + - Martin Blumenstingl > + > +description: | > + The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > + contains registers for various IP blocks such as pin-controller bits for > + the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > + The registers can be accessed directly when not running in "secure mode". > + When "secure mode" is enabled then these registers have to be accessed > + through secure monitor calls. > + > +# We need a select here so we don't match all nodes with 'syscon' No, you don't. The default 'select' will ignore 'syscon' and 'simple-mfd'. > +select: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + required: > + - compatible > + > +properties: > + compatible: > + items: > + - enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + - const: syscon > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + secbus2: system-controller@4000 { > + compatible = "amlogic,meson8-secbus2", "syscon"; > + reg = <0x4000 0x2000>; > + }; > -- > 2.30.0 > _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic