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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Huacai Chen" <chenhuacai@kernel.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 30/35] hw/mips: Use address translation helper to handle ENVP_ADDR
Date: Sun,  3 Jan 2021 21:50:16 +0100	[thread overview]
Message-ID: <20210103205021.2837760-31-f4bug@amsat.org> (raw)
In-Reply-To: <20210103205021.2837760-1-f4bug@amsat.org>

From: Jiaxun Yang <jiaxun.yang@flygoat.com>

It will signed extend vaddr properly.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215064200.28751-4-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/mips/fuloong2e.c | 24 +++++++++---------
 hw/mips/malta.c     | 62 ++++++++++++++++++++++-----------------------
 2 files changed, 43 insertions(+), 43 deletions(-)

diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 804bef94cda..8bc854130ed 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -49,7 +49,8 @@
 
 #define DEBUG_FULOONG2E_INIT
 
-#define ENVP_ADDR               0x80002000l
+#define ENVP_PADDR              0x2000
+#define ENVP_VADDR              cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
 #define ENVP_NB_ENTRIES         16
 #define ENVP_ENTRY_SIZE         256
 
@@ -100,7 +101,7 @@ static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
     }
 
     table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
-    prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
+    prom_buf[index] = tswap32(ENVP_VADDR + table_addr);
 
     va_start(ap, string);
     vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
@@ -172,8 +173,7 @@ static uint64_t load_kernel(CPUMIPSState *env)
     prom_set(prom_buf, index++, "modetty0=38400n8r");
     prom_set(prom_buf, index++, NULL);
 
-    rom_add_blob_fixed("prom", prom_buf, prom_size,
-                       cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
+    rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
 
     g_free(prom_buf);
     return kernel_entry;
@@ -199,14 +199,14 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base,
     stl_p(p++, 0x3c040000);
     /* ori a0, a0, 2 */
     stl_p(p++, 0x34840002);
-    /* lui a1, high(ENVP_ADDR) */
-    stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));
-    /* ori a1, a0, low(ENVP_ADDR) */
-    stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));
-    /* lui a2, high(ENVP_ADDR + 8) */
-    stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff));
-    /* ori a2, a2, low(ENVP_ADDR + 8) */
-    stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));
+    /* lui a1, high(ENVP_VADDR) */
+    stl_p(p++, 0x3c050000 | ((ENVP_VADDR >> 16) & 0xffff));
+    /* ori a1, a0, low(ENVP_VADDR) */
+    stl_p(p++, 0x34a50000 | (ENVP_VADDR & 0xffff));
+    /* lui a2, high(ENVP_VADDR + 8) */
+    stl_p(p++, 0x3c060000 | (((ENVP_VADDR + 8) >> 16) & 0xffff));
+    /* ori a2, a2, low(ENVP_VADDR + 8) */
+    stl_p(p++, 0x34c60000 | ((ENVP_VADDR + 8) & 0xffff));
     /* lui a3, high(env->ram_size) */
     stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));
     /* ori a3, a3, low(env->ram_size) */
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 1fbb8a32207..9afc0b427bf 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -62,7 +62,8 @@
 #include "hw/mips/cps.h"
 #include "hw/qdev-clock.h"
 
-#define ENVP_ADDR           0x80002000l
+#define ENVP_PADDR          0x2000
+#define ENVP_VADDR          cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
 #define ENVP_NB_ENTRIES     16
 #define ENVP_ENTRY_SIZE     256
 
@@ -656,29 +657,29 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr,
                                 /* li a0,2                      */
     }
 
-    stw_p(p++, 0xe3a0 | NM_HI1(ENVP_ADDR - 64));
+    stw_p(p++, 0xe3a0 | NM_HI1(ENVP_VADDR - 64));
 
-    stw_p(p++, NM_HI2(ENVP_ADDR - 64));
-                                /* lui sp,%hi(ENVP_ADDR - 64)   */
+    stw_p(p++, NM_HI2(ENVP_VADDR - 64));
+                                /* lui sp,%hi(ENVP_VADDR - 64)   */
 
-    stw_p(p++, 0x83bd); stw_p(p++, NM_LO(ENVP_ADDR - 64));
-                                /* ori sp,sp,%lo(ENVP_ADDR - 64) */
+    stw_p(p++, 0x83bd); stw_p(p++, NM_LO(ENVP_VADDR - 64));
+                                /* ori sp,sp,%lo(ENVP_VADDR - 64) */
 
-    stw_p(p++, 0xe0a0 | NM_HI1(ENVP_ADDR));
+    stw_p(p++, 0xe0a0 | NM_HI1(ENVP_VADDR));
 
-    stw_p(p++, NM_HI2(ENVP_ADDR));
-                                /* lui a1,%hi(ENVP_ADDR)        */
+    stw_p(p++, NM_HI2(ENVP_VADDR));
+                                /* lui a1,%hi(ENVP_VADDR)        */
 
-    stw_p(p++, 0x80a5); stw_p(p++, NM_LO(ENVP_ADDR));
-                                /* ori a1,a1,%lo(ENVP_ADDR)     */
+    stw_p(p++, 0x80a5); stw_p(p++, NM_LO(ENVP_VADDR));
+                                /* ori a1,a1,%lo(ENVP_VADDR)     */
 
-    stw_p(p++, 0xe0c0 | NM_HI1(ENVP_ADDR + 8));
+    stw_p(p++, 0xe0c0 | NM_HI1(ENVP_VADDR + 8));
 
-    stw_p(p++, NM_HI2(ENVP_ADDR + 8));
-                                /* lui a2,%hi(ENVP_ADDR + 8)    */
+    stw_p(p++, NM_HI2(ENVP_VADDR + 8));
+                                /* lui a2,%hi(ENVP_VADDR + 8)    */
 
-    stw_p(p++, 0x80c6); stw_p(p++, NM_LO(ENVP_ADDR + 8));
-                                /* ori a2,a2,%lo(ENVP_ADDR + 8) */
+    stw_p(p++, 0x80c6); stw_p(p++, NM_LO(ENVP_VADDR + 8));
+                                /* ori a2,a2,%lo(ENVP_VADDR + 8) */
 
     stw_p(p++, 0xe0e0 | NM_HI1(loaderparams.ram_low_size));
 
@@ -878,18 +879,18 @@ static void write_bootloader(uint8_t *base, uint64_t run_addr,
         stl_p(p++, 0x24040002);              /* addiu a0, zero, 2 */
     }
 
-    /* lui sp, high(ENVP_ADDR) */
-    stl_p(p++, 0x3c1d0000 | (((ENVP_ADDR - 64) >> 16) & 0xffff));
-    /* ori sp, sp, low(ENVP_ADDR) */
-    stl_p(p++, 0x37bd0000 | ((ENVP_ADDR - 64) & 0xffff));
-    /* lui a1, high(ENVP_ADDR) */
-    stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));
-    /* ori a1, a1, low(ENVP_ADDR) */
-    stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));
-    /* lui a2, high(ENVP_ADDR + 8) */
-    stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff));
-    /* ori a2, a2, low(ENVP_ADDR + 8) */
-    stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));
+    /* lui sp, high(ENVP_VADDR) */
+    stl_p(p++, 0x3c1d0000 | (((ENVP_VADDR - 64) >> 16) & 0xffff));
+    /* ori sp, sp, low(ENVP_VADDR) */
+    stl_p(p++, 0x37bd0000 | ((ENVP_VADDR - 64) & 0xffff));
+    /* lui a1, high(ENVP_VADDR) */
+    stl_p(p++, 0x3c050000 | ((ENVP_VADDR >> 16) & 0xffff));
+    /* ori a1, a1, low(ENVP_VADDR) */
+    stl_p(p++, 0x34a50000 | (ENVP_VADDR & 0xffff));
+    /* lui a2, high(ENVP_VADDR + 8) */
+    stl_p(p++, 0x3c060000 | (((ENVP_VADDR + 8) >> 16) & 0xffff));
+    /* ori a2, a2, low(ENVP_VADDR + 8) */
+    stl_p(p++, 0x34c60000 | ((ENVP_VADDR + 8) & 0xffff));
     /* lui a3, high(ram_low_size) */
     stl_p(p++, 0x3c070000 | (loaderparams.ram_low_size >> 16));
     /* ori a3, a3, low(ram_low_size) */
@@ -1015,7 +1016,7 @@ static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
     }
 
     table_addr = sizeof(uint32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
-    prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
+    prom_buf[index] = tswap32(ENVP_VADDR + table_addr);
 
     va_start(ap, string);
     vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
@@ -1122,8 +1123,7 @@ static uint64_t load_kernel(void)
     prom_set(prom_buf, prom_index++, "38400n8r");
     prom_set(prom_buf, prom_index++, NULL);
 
-    rom_add_blob_fixed("prom", prom_buf, prom_size,
-                       cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
+    rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
 
     g_free(prom_buf);
     return kernel_entry;
-- 
2.26.2



  parent reply	other threads:[~2021-01-03 21:15 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-03 20:49 [PULL 00/35] MIPS patches for 2021-01-03 Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 01/35] hw/pci-host: Use the PCI_BUILD_BDF() macro from 'hw/pci/pci.h' Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 02/35] hw/pci-host/uninorth: Use the PCI_FUNC() " Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 03/35] hw: Use the PCI_SLOT() " Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 04/35] hw: Use the PCI_DEVFN() " Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 05/35] hw/pci-host/bonito: Display hexadecimal value with '0x' prefix Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 06/35] hw/pci-host/bonito: Use pci_config_set_interrupt_pin() Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 07/35] vt82c686: Rename AC97/MC97 parts from VT82C686B to VIA Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 08/35] vt82c686: Remove unnecessary _DEVICE suffix from type macros Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 09/35] vt82c686: Rename VT82C686B to VT82C686B_ISA Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 10/35] vt82c686: Remove vt82c686b_[am]c97_init() functions Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 11/35] vt82c686: Split off via-[am]c97 into separate file in hw/audio Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 12/35] audio/via-ac97: Simplify code and set user_creatable to false Philippe Mathieu-Daudé
2021-01-03 20:49 ` [PULL 13/35] vt82c686: Remove legacy vt82c686b_isa_init() function Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 14/35] vt82c686: Remove legacy vt82c686b_pm_init() function Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 15/35] vt82c686: Convert debug printf to trace points Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 16/35] vt82c686: Remove unneeded includes and defines Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 17/35] vt82c686: Use shorter name for local variable holding object state Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 18/35] vt82c686: Rename superio config related parts Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 19/35] clock: Introduce clock_ticks_to_ns() Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 20/35] target/mips: Don't use clock_get_ns() in clock period calculation Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 21/35] clock: Remove clock_get_ns() Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 22/35] clock: Define and use new clock_display_freq() Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 23/35] hw/intc: Rework Loongson LIOINTC Philippe Mathieu-Daudé
2021-01-10 19:49   ` Peter Maydell
2021-01-10 21:34     ` Philippe Mathieu-Daudé
2021-01-10 21:51       ` BALATON Zoltan
2021-01-11  0:36         ` Huacai Chen
2021-01-11  1:33           ` Jiaxun Yang
2021-01-11 10:20             ` BALATON Zoltan
2021-01-11 10:35               ` Peter Maydell
2021-01-11 10:52                 ` BALATON Zoltan
2021-01-12  0:35                 ` Jiaxun Yang
2021-01-03 20:50 ` [PULL 24/35] hw/mips: Implement fw_cfg_arch_key_name() Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 25/35] hw/mips: Add Loongson-3 boot parameter helpers Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 26/35] hw/mips: Add Loongson-3 machine support Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 27/35] docs/system: Update MIPS machine documentation Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 28/35] hw/mips: Make bootloader addresses unsigned Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 29/35] hw/mips/malta: Use address translation helper to calculate bootloader_run_addr Philippe Mathieu-Daudé
2021-01-03 20:50 ` Philippe Mathieu-Daudé [this message]
2021-01-03 20:50 ` [PULL 31/35] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 32/35] hw/mips/fuloong2e: Replace faulty documentation links Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 33/35] hw/mips/fuloong2e: Remove unused env entry Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 34/35] hw/mips/fuloong2e: Correct cpuclock in PROM environment Philippe Mathieu-Daudé
2021-01-03 20:50 ` [PULL 35/35] tests/acceptance: Test boot_linux_console for fuloong2e Philippe Mathieu-Daudé
2021-01-04 11:41 ` [PULL 00/35] MIPS patches for 2021-01-03 Peter Maydell
2021-01-04 11:50   ` Peter Maydell
2021-01-04 13:53     ` Philippe Mathieu-Daudé
2021-01-04 13:59       ` Philippe Mathieu-Daudé
2021-01-04 15:01         ` Peter Maydell
2021-01-04 17:39           ` Philippe Mathieu-Daudé
2021-01-04 18:24             ` Philippe Mathieu-Daudé
2021-01-04 18:30               ` Philippe Mathieu-Daudé
2021-01-05  1:53                 ` Huacai Chen
2021-01-05  8:44                   ` Philippe Mathieu-Daudé
2021-01-05  9:36             ` Philippe Mathieu-Daudé
2021-01-05 13:17               ` Peter Maydell
2021-01-05 15:14                 ` Philippe Mathieu-Daudé

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