[PATCH 1/3] drm/amdgpu: Add new mode 2560x1440

[PATCH 1/3] drm/amdgpu: Add new mode 2560x1440

[Emily.Deng]

Add one more 2k resolution which appears frequently in market.

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index ffcc64ec6473..9810af712cc0 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -294,7 +294,7 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
 	static const struct mode_size {
 		int w;
 		int h;
-	} common_modes[21] = {
+	} common_modes[] = {
 		{ 640,  480},
 		{ 720,  480},
 		{ 800,  600},
@@ -312,13 +312,14 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
 		{1600, 1200},
 		{1920, 1080},
 		{1920, 1200},
+		{2560, 1440},
 		{4096, 3112},
 		{3656, 2664},
 		{3840, 2160},
 		{4096, 2160},
 	};
 
-	for (i = 0; i < 21; i++) {
+	for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
 		mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
 		drm_mode_probed_add(connector, mode);
 	}
-- 
2.25.1

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[PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10

[Emily.Deng]

According to hw, after navi10,it runs in dfll mode, and should
read sclk from AverageGfxclkFrequency.

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
 		*size = 4;
 		break;
 	case AMDGPU_PP_SENSOR_GFX_SCLK:
-		ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+		ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
 		*(uint32_t *)data *= 100;
 		*size = 4;
 		break;
-- 
2.25.1

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[PATCH 3/3] drm/amdgpu:Limit the resolution for virtual_display

[Emily.Deng]

Limit the resolution not bigger than 16384, which means
dev->mode_info.num_crtc * common_modes[i].w not bigger than 16384.

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 9810af712cc0..6fc864cfef61 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -289,6 +289,7 @@ dce_virtual_encoder(struct drm_connector *connector)
 static int dce_virtual_get_modes(struct drm_connector *connector)
 {
 	struct drm_device *dev = connector->dev;
+	struct amdgpu_device *adev = dev->dev_private;
 	struct drm_display_mode *mode = NULL;
 	unsigned i;
 	static const struct mode_size {
@@ -320,8 +321,10 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
 	};
 
 	for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
-		mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
-		drm_mode_probed_add(connector, mode);
+		if (adev->mode_info.num_crtc <= 4 ||  common_modes[i].w <= 2560) {
+			mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
+			drm_mode_probed_add(connector, mode);
+		}
 	}
 
 	return 0;
-- 
2.25.1

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Re: [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440

[Alex Deucher]

On Tue, Jan 5, 2021 at 8:05 PM Emily.Deng <Emily.Deng@amd.com> wrote:
>
> Add one more 2k resolution which appears frequently in market.
>
> Signed-off-by: Emily.Deng <Emily.Deng@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> index ffcc64ec6473..9810af712cc0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> @@ -294,7 +294,7 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
>         static const struct mode_size {
>                 int w;
>                 int h;
> -       } common_modes[21] = {
> +       } common_modes[] = {
>                 { 640,  480},
>                 { 720,  480},
>                 { 800,  600},
> @@ -312,13 +312,14 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
>                 {1600, 1200},
>                 {1920, 1080},
>                 {1920, 1200},
> +               {2560, 1440},
>                 {4096, 3112},
>                 {3656, 2664},
>                 {3840, 2160},
>                 {4096, 2160},
>         };
>
> -       for (i = 0; i < 21; i++) {
> +       for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
>                 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
>                 drm_mode_probed_add(connector, mode);
>         }
> --
> 2.25.1
>
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
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Re: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10

[Alex Deucher]

On Tue, Jan 5, 2021 at 8:05 PM Emily.Deng <Emily.Deng@amd.com> wrote:
>
> According to hw, after navi10,it runs in dfll mode, and should
> read sclk from AverageGfxclkFrequency.
>
> Signed-off-by: Emily.Deng <Emily.Deng@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index 51e83123f72a..7ebf9588983f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
>                 *size = 4;
>                 break;
>         case AMDGPU_PP_SENSOR_GFX_SCLK:
> -               ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
> +               ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
>                 *(uint32_t *)data *= 100;
>                 *size = 4;
>                 break;
> --
> 2.25.1
>
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
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RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10

[Quan, Evan]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Evan Quan <evan.quan@amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Emily.Deng
Sent: Wednesday, January 6, 2021 9:05 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily <Emily.Deng@amd.com>
Subject: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10

According to hw, after navi10,it runs in dfll mode, and should
read sclk from AverageGfxclkFrequency.

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
 *size = 4;
 break;
 case AMDGPU_PP_SENSOR_GFX_SCLK:
-ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
 *(uint32_t *)data *= 100;
 *size = 4;
 break;
--
2.25.1

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RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10

[Feng, Kenneth]

[AMD Official Use Only - Internal Distribution Only]

Hello Emily,
The average clock value is a little different from the 'current clock' value.
May I know what's the purpose of this patch to display the average clock? Any issue or any customer requirement?
Thanks.


Best Regards
Kenneth

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Emily.Deng
Sent: Wednesday, January 6, 2021 9:05 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily <Emily.Deng@amd.com>
Subject: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10

[CAUTION: External Email]

According to hw, after navi10,it runs in dfll mode, and should read sclk from AverageGfxclkFrequency.

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 51e83123f72a..7ebf9588983f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context *smu,
                *size = 4;
                break;
        case AMDGPU_PP_SENSOR_GFX_SCLK:
-               ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+               ret = navi10_get_smu_metrics_data(smu, 
+ METRICS_AVERAGE_GFXCLK, (uint32_t *)data);
                *(uint32_t *)data *= 100;
                *size = 4;
                break;
--
2.25.1

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Re: [PATCH 1/3] drm/amdgpu: Add new mode 2560x1440

[Alex Deucher]

On Tue, Jan 5, 2021 at 3:37 AM Emily.Deng <Emily.Deng@amd.com> wrote:
>

Please add a patch description.  With that fixed this patch is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> index bc3dcc262fc2..2b16c8faca34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
> @@ -324,7 +324,7 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
>         static const struct mode_size {
>                 int w;
>                 int h;
> -       } common_modes[21] = {
> +       } common_modes[] = {
>                 { 640,  480},
>                 { 720,  480},
>                 { 800,  600},
> @@ -342,13 +342,14 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
>                 {1600, 1200},
>                 {1920, 1080},
>                 {1920, 1200},
> +               {2560, 1440},
>                 {4096, 3112},
>                 {3656, 2664},
>                 {3840, 2160},
>                 {4096, 2160},
>         };
>
> -       for (i = 0; i < 21; i++) {
> +       for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
>                 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
>                 drm_mode_probed_add(connector, mode);
>         }
> --
> 2.25.1
>
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[PATCH 1/3] drm/amdgpu: Add new mode 2560x1440

[Emily.Deng]

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index bc3dcc262fc2..2b16c8faca34 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -324,7 +324,7 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
 	static const struct mode_size {
 		int w;
 		int h;
-	} common_modes[21] = {
+	} common_modes[] = {
 		{ 640,  480},
 		{ 720,  480},
 		{ 800,  600},
@@ -342,13 +342,14 @@ static int dce_virtual_get_modes(struct drm_connector *connector)
 		{1600, 1200},
 		{1920, 1080},
 		{1920, 1200},
+		{2560, 1440},
 		{4096, 3112},
 		{3656, 2664},
 		{3840, 2160},
 		{4096, 2160},
 	};
 
-	for (i = 0; i < 21; i++) {
+	for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
 		mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
 		drm_mode_probed_add(connector, mode);
 	}
-- 
2.25.1

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