* [PATCH] mmc: sdhci-pci-gli: Add a switch to enable/disable CQHCI support
@ 2021-01-06 8:53 Renius Chen
2021-01-13 11:25 ` Ulf Hansson
0 siblings, 1 reply; 2+ messages in thread
From: Renius Chen @ 2021-01-06 8:53 UTC (permalink / raw)
To: ulf.hansson, adrian.hunter
Cc: linux-mmc, linux-kernel, ben.chuang, greg.tu, Renius Chen
Add a vendor-specific bit named GLI_9763E_MB_ERP_ON at the bit7 of
register 888h to decide whether to enhance random R/W performance
of GL9763E. CQHCI support will be enabled if and only if the bit is
set and the GLI_9763E_MB_CMQ_OFF bit is not set.
Signed-off-by: Renius Chen <reniuschengl@gmail.com>
---
drivers/mmc/host/sdhci-pci-gli.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index b85edd62e7f0..c6a107d7c742 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -84,6 +84,7 @@
#define GLI_9763E_VHS_REV_W 0x2
#define PCIE_GLI_9763E_MB 0x888
#define GLI_9763E_MB_CMDQ_OFF BIT(19)
+#define GLI_9763E_MB_ERP_ON BIT(7)
#define PCIE_GLI_9763E_SCR 0x8E0
#define GLI_9763E_SCR_AXI_REQ BIT(9)
@@ -814,7 +815,8 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
pci_read_config_dword(pdev, PCIE_GLI_9763E_MB, &value);
if (!(value & GLI_9763E_MB_CMDQ_OFF))
- host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
+ if (value & GLI_9763E_MB_ERP_ON)
+ host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
gli_pcie_enable_msi(slot);
host->mmc_host_ops.hs400_enhanced_strobe =
--
2.27.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] mmc: sdhci-pci-gli: Add a switch to enable/disable CQHCI support
2021-01-06 8:53 [PATCH] mmc: sdhci-pci-gli: Add a switch to enable/disable CQHCI support Renius Chen
@ 2021-01-13 11:25 ` Ulf Hansson
0 siblings, 0 replies; 2+ messages in thread
From: Ulf Hansson @ 2021-01-13 11:25 UTC (permalink / raw)
To: Renius Chen
Cc: Adrian Hunter, linux-mmc, Linux Kernel Mailing List, Ben Chuang, greg.tu
On Wed, 6 Jan 2021 at 09:53, Renius Chen <reniuschengl@gmail.com> wrote:
>
> Add a vendor-specific bit named GLI_9763E_MB_ERP_ON at the bit7 of
> register 888h to decide whether to enhance random R/W performance
> of GL9763E. CQHCI support will be enabled if and only if the bit is
> set and the GLI_9763E_MB_CMQ_OFF bit is not set.
>
> Signed-off-by: Renius Chen <reniuschengl@gmail.com>
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-pci-gli.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index b85edd62e7f0..c6a107d7c742 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -84,6 +84,7 @@
> #define GLI_9763E_VHS_REV_W 0x2
> #define PCIE_GLI_9763E_MB 0x888
> #define GLI_9763E_MB_CMDQ_OFF BIT(19)
> +#define GLI_9763E_MB_ERP_ON BIT(7)
> #define PCIE_GLI_9763E_SCR 0x8E0
> #define GLI_9763E_SCR_AXI_REQ BIT(9)
>
> @@ -814,7 +815,8 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
>
> pci_read_config_dword(pdev, PCIE_GLI_9763E_MB, &value);
> if (!(value & GLI_9763E_MB_CMDQ_OFF))
> - host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
> + if (value & GLI_9763E_MB_ERP_ON)
> + host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
>
> gli_pcie_enable_msi(slot);
> host->mmc_host_ops.hs400_enhanced_strobe =
> --
> 2.27.0
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2021-01-06 8:53 [PATCH] mmc: sdhci-pci-gli: Add a switch to enable/disable CQHCI support Renius Chen
2021-01-13 11:25 ` Ulf Hansson
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