From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D447C433DB for ; Fri, 8 Jan 2021 18:26:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1535123A7D for ; Fri, 8 Jan 2021 18:26:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728529AbhAHS0c (ORCPT ); Fri, 8 Jan 2021 13:26:32 -0500 Received: from mga06.intel.com ([134.134.136.31]:52084 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727067AbhAHS0c (ORCPT ); Fri, 8 Jan 2021 13:26:32 -0500 IronPort-SDR: 9jAORHBtJh/nY3BVIW+8DtGhp4e/vMIg+h8hYAbCWSWwWYVpJba1cu2AdPoi0tlMKOJCcV2Mi3 ppJu5zYcBAoA== X-IronPort-AV: E=McAfee;i="6000,8403,9858"; a="239187058" X-IronPort-AV: E=Sophos;i="5.79,332,1602572400"; d="scan'208";a="239187058" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2021 10:25:51 -0800 IronPort-SDR: sgZW7y6IYKAOcWtHW3tyWjsIFmDmZPVAUnG9KOr7ETYEIYbVODxGfswzcQnKJqgDU+ClmV/Od5 jXLvMVV465Ig== X-IronPort-AV: E=Sophos;i="5.79,332,1602572400"; d="scan'208";a="497930909" Received: from mdroper-desk1.fm.intel.com (HELO mdroper-desk1.amr.corp.intel.com) ([10.1.27.168]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2021 10:25:48 -0800 Date: Fri, 8 Jan 2021 10:25:48 -0800 From: Matt Roper To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, Tvrtko Ursulin , Mika Kuoppala , stable@vger.kernel.org Subject: Re: [PATCH] drm/i915/gt: Prevent use of engine->wa_ctx after error Message-ID: <20210108182548.GG3894148@mdroper-desk1.amr.corp.intel.com> References: <20210108150924.29437-1-chris@chris-wilson.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210108150924.29437-1-chris@chris-wilson.co.uk> Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Fri, Jan 08, 2021 at 03:09:24PM +0000, Chris Wilson wrote: > On error we unpin and free the wa_ctx.vma, but do not clear any of the > derived flags. During lrc_init, we look at the flags and attempt to > dereference the wa_ctx.vma if they are set. To protect the error path > where we try to limp along without the wa_ctx, make sure we clear those > flags! > > Reported-by: Matt Roper > Fixes: 604a8f6f1e33 ("drm/i915/lrc: Only enable per-context and per-bb buffers if set") > Signed-off-by: Chris Wilson > Cc: Matt Roper > Cc: Tvrtko Ursulin > Cc: Mika Kuoppala > Cc: # v4.15+ Reviewed-by: Matt Roper > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 4e856947fb13..703d9ecc3f7e 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1453,6 +1453,9 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs *engine) > void lrc_fini_wa_ctx(struct intel_engine_cs *engine) > { > i915_vma_unpin_and_release(&engine->wa_ctx.vma, 0); > + > + /* Called on error unwind, clear all flags to prevent further use */ > + memset(&engine->wa_ctx, 0, sizeof(engine->wa_ctx)); > } > > typedef u32 *(*wa_bb_func_t)(struct intel_engine_cs *engine, u32 *batch); > -- > 2.20.1 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C79F5C433E0 for ; Fri, 8 Jan 2021 18:25:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7556F23A79 for ; Fri, 8 Jan 2021 18:25:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7556F23A79 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E3F6B6E888; Fri, 8 Jan 2021 18:25:52 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id E3DAC6E888 for ; Fri, 8 Jan 2021 18:25:51 +0000 (UTC) IronPort-SDR: a++I0VKOvP7nk1OANyohAgvzzNmsI3szhPSjm34F2km/oWqw1yQQL6ry5rbRIPJ/XZ6twaYz+D bpeZDt4K7TwA== X-IronPort-AV: E=McAfee;i="6000,8403,9858"; a="174129748" X-IronPort-AV: E=Sophos;i="5.79,332,1602572400"; d="scan'208";a="174129748" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2021 10:25:51 -0800 IronPort-SDR: sgZW7y6IYKAOcWtHW3tyWjsIFmDmZPVAUnG9KOr7ETYEIYbVODxGfswzcQnKJqgDU+ClmV/Od5 jXLvMVV465Ig== X-IronPort-AV: E=Sophos;i="5.79,332,1602572400"; d="scan'208";a="497930909" Received: from mdroper-desk1.fm.intel.com (HELO mdroper-desk1.amr.corp.intel.com) ([10.1.27.168]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2021 10:25:48 -0800 Date: Fri, 8 Jan 2021 10:25:48 -0800 From: Matt Roper To: Chris Wilson Message-ID: <20210108182548.GG3894148@mdroper-desk1.amr.corp.intel.com> References: <20210108150924.29437-1-chris@chris-wilson.co.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210108150924.29437-1-chris@chris-wilson.co.uk> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Prevent use of engine->wa_ctx after error X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, Jan 08, 2021 at 03:09:24PM +0000, Chris Wilson wrote: > On error we unpin and free the wa_ctx.vma, but do not clear any of the > derived flags. During lrc_init, we look at the flags and attempt to > dereference the wa_ctx.vma if they are set. To protect the error path > where we try to limp along without the wa_ctx, make sure we clear those > flags! > > Reported-by: Matt Roper > Fixes: 604a8f6f1e33 ("drm/i915/lrc: Only enable per-context and per-bb buffers if set") > Signed-off-by: Chris Wilson > Cc: Matt Roper > Cc: Tvrtko Ursulin > Cc: Mika Kuoppala > Cc: # v4.15+ Reviewed-by: Matt Roper > --- > drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 4e856947fb13..703d9ecc3f7e 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1453,6 +1453,9 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs *engine) > void lrc_fini_wa_ctx(struct intel_engine_cs *engine) > { > i915_vma_unpin_and_release(&engine->wa_ctx.vma, 0); > + > + /* Called on error unwind, clear all flags to prevent further use */ > + memset(&engine->wa_ctx, 0, sizeof(engine->wa_ctx)); > } > > typedef u32 *(*wa_bb_func_t)(struct intel_engine_cs *engine, u32 *batch); > -- > 2.20.1 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx