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Date:   Mon, 11 Jan 2021 23:26:31 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Doug Anderson <dianders@chromium.org>
Cc:     Bjorn Andersson <bjorn.andersson@linaro.org>,
        Mark Brown <broonie@kernel.org>, Wolfram Sang <wsa@kernel.org>,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        Andy Gross <agross@kernel.org>,
        Matthias Kaehlcke <mka@chromium.org>,
        Sumit Semwal <sumit.semwal@linaro.org>,
        Amit Pundir <amit.pundir@linaro.org>,
        linux-spi <linux-spi@vger.kernel.org>, linux-i2c@vger.kernel.org,
        LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 7/7] arm64: dts: qcom: sdm845: enable dma for spi
Message-ID: <20210111175631.GD2771@vkoul-mobl>
References: <20210111151651.1616813-1-vkoul@kernel.org>
 <20210111151651.1616813-8-vkoul@kernel.org>
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On 11-01-21, 08:47, Doug Anderson wrote:
> Hi,
> 
> On Mon, Jan 11, 2021 at 7:18 AM Vinod Koul <vkoul@kernel.org> wrote:
> >
> > @@ -2622,6 +2626,13 @@ pinmux {
> >                                                "gpio2", "gpio3";
> >                                         function = "qup0";
> >                                 };
> > +
> > +                               config {
> 
> Convention in Qualcomm device tree files seems to be that the node is
> "pinconf", not "config".

Yes missed that, thanks for pointing
> 
> 
> > +                                       pins = "gpio0", "gpio1",
> > +                                              "gpio2", "gpio3";
> > +                                       drive-strength = <6>;
> > +                                       bias-disable;
> > +                               };
> 
> Pin config almost never belongs in the SoC dtsi file.  This should be
> in the board .dts file.  What if pulls are needed on some pins?  What
> if you need a stronger or weaker drive strength?

Right I will move it to dtsi

-- 
~Vinod