From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28754C433E9 for ; Wed, 13 Jan 2021 03:04:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E2E4F2311A for ; Wed, 13 Jan 2021 03:04:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728800AbhAMDEU (ORCPT ); Tue, 12 Jan 2021 22:04:20 -0500 Received: from mail.kernel.org ([198.145.29.99]:43928 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728722AbhAMDET (ORCPT ); Tue, 12 Jan 2021 22:04:19 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id E022923132; Wed, 13 Jan 2021 03:03:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1610507019; bh=Lb24rQrKobyTU7A/TU/jdr6OZKSzLpDca0GkNO8kDnI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=jPTmRs+lvTvzIyhdI94vZd+ttqxTP5Jz129r0rQnL/9e6DyGCnqjJgOitPc+9ImbU 6h82quHxRePvuryNqcC4SXZjhdjDD6q8OI/aPtvGDOPOGb4lf8RuJ1SBcwwaLOon4a pwSAq8m6YfyuprW6Qf8K8xdMNupn3xX8FpEmzegnxmKo69FE0JK1lRrHayX2DW/OyR c/EWEDRGxtAeOH5cI4zy4hUmsDjdi6NovCgQ/q3B0lwmz+Vyc+HxZ5u77f0RgIW6N9 WWflhDvfUkTnfRteSgw63pdXjDnbrD1xpGmke2M699RVJv7a899G2Wx8VDlCzJujsW fu9gpKF5dkLjw== Date: Wed, 13 Jan 2021 08:33:33 +0530 From: Vinod Koul To: Doug Anderson Cc: Bjorn Andersson , Mark Brown , Wolfram Sang , linux-arm-msm , Andy Gross , Matthias Kaehlcke , Sumit Semwal , Amit Pundir , linux-spi , linux-i2c@vger.kernel.org, LKML Subject: Re: [PATCH 0/7] Add and enable GPI DMA users Message-ID: <20210113030333.GV2771@vkoul-mobl> References: <20210111151651.1616813-1-vkoul@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hello Doug, On 12-01-21, 16:01, Doug Anderson wrote: > Hi, > > On Mon, Jan 11, 2021 at 7:17 AM Vinod Koul wrote: > > > > Hello, > > > > This series add the GPI DMA in qcom geni spi and i2c drivers. For this we > > first need to move GENI_IF_DISABLE_RO and struct geni_wrapper to common > > headers and then add support for gpi dma in geni driver. > > > > Then we add spi and i2c geni driver changes to support this DMA. > > > > Lastly, add the GPI dma nodes and enable dma for spi found in Rb3 board. > > > > To merge this, we could merge all thru qcom tree with ack on spi/i2c. > > It'd be super great if somewhere (ideally in the commit message and > maybe somewhere in the code) you could talk more about the different > modes. Maybe something like this (if it's correct): > > GPI Mode (confusingly, also known as "GSI" mode in some places): In > this mode something else running on the SoC is sharing access to the > geni instance. This mode allows sharing the device between the Linux > kernel and other users including handling the fact that other users > might be running the geni port at a different clock rate. GPI mode > limits what you can do with a port. For instance, direct control of > chip select is not allowed. NOTE: if firmware has configured a geni > instance for GPI then FIFO and SE_DMA usage is not allowed. > Conversely, if firmware has not configured a geni instance for GPI > then only FIFO and SE_DMA usage is allowed. > > SE DMA Mode: Data transfers happen over DMA. > > SE FIFO Mode: Data is manually transferred into the FIFO by the CPU. I think it is a good feedback, there is indeed bunch of confusion wrt QUP DMA and i think we should add above to qcom geni driver and not just in cover letter. FWIW for all practical purposes GSI and GPI can be used interchangeably. There are some nuisances involved like firmware and a microcontroller but for the sake of simplicity we can skip that :) Thanks -- ~Vinod