Hi, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on clk/clk-next] [also build test WARNING on linus/master v5.11-rc3 next-20210114] [cannot apply to thermal/next soc-thermal/next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/kostap-marvell-com/Enable-usage-of-Marvell-FW-SIP-services/20210114-183207 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next config: arm64-allyesconfig (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/8dc917b26b54d723831b58c1f166a15a1b7d28e2 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review kostap-marvell-com/Enable-usage-of-Marvell-FW-SIP-services/20210114-183207 git checkout 8dc917b26b54d723831b58c1f166a15a1b7d28e2 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): In file included from include/linux/regmap.h:20, from drivers/clk/mvebu/ap-cpu-clk.c:21: drivers/clk/mvebu/ap-cpu-clk.c: In function 'legacy_regmap_read_poll_timeout': drivers/clk/mvebu/ap-cpu-clk.c:252:11: error: 'val' undeclared (first use in this function) 252 | reg, val, | ^~~ include/linux/iopoll.h:46:14: note: in definition of macro 'read_poll_timeout' 46 | (val) = op(args); \ | ^~~~ drivers/clk/mvebu/ap-cpu-clk.c:251:9: note: in expansion of macro 'regmap_read_poll_timeout' 251 | return regmap_read_poll_timeout(clk->pll_cr_base, | ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/clk/mvebu/ap-cpu-clk.c:252:11: note: each undeclared identifier is reported only once for each function it appears in 252 | reg, val, | ^~~ include/linux/iopoll.h:46:14: note: in definition of macro 'read_poll_timeout' 46 | (val) = op(args); \ | ^~~~ drivers/clk/mvebu/ap-cpu-clk.c:251:9: note: in expansion of macro 'regmap_read_poll_timeout' 251 | return regmap_read_poll_timeout(clk->pll_cr_base, | ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/clk/mvebu/ap-cpu-clk.c: In function 'ap_cpu_clk_set_rate': drivers/clk/mvebu/ap-cpu-clk.c:313:20: error: macro "regmap_read_poll_timeout" requires 6 arguments, but only 3 given 313 | stable_bit); | ^ In file included from drivers/clk/mvebu/ap-cpu-clk.c:21: include/linux/regmap.h:103: note: macro "regmap_read_poll_timeout" defined here 103 | #define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ | >> drivers/clk/mvebu/ap-cpu-clk.c:311:6: warning: assignment to 'int' from 'int (*)(struct ap_cpu_clk *, unsigned int, unsigned int)' makes integer from pointer without a cast [-Wint-conversion] 311 | ret = clk->regmap_read_poll_timeout(clk, | ^ >> drivers/clk/mvebu/ap-cpu-clk.c:277:61: warning: variable 'stable_bit' set but not used [-Wunused-but-set-variable] 277 | unsigned int cpu_clkdiv_reg, cpu_force_reg, cpu_ratio_reg, stable_bit; | ^~~~~~~~~~ drivers/clk/mvebu/ap-cpu-clk.c: In function 'ap_cpu_clock_probe': drivers/clk/mvebu/ap-cpu-clk.c:440:30: error: 'struct ap_cpu_clk' has no member named 'regmap_wriite'; did you mean 'regmap_write'? 440 | ap_cpu_clk[cluster_index].regmap_wriite = smc_regmap_write; | ^~~~~~~~~~~~~ | regmap_write drivers/clk/mvebu/ap-cpu-clk.c:446:30: error: 'struct ap_cpu_clk' has no member named 'regmap_wriite'; did you mean 'regmap_write'? 446 | ap_cpu_clk[cluster_index].regmap_wriite = legacy_regmap_write; | ^~~~~~~~~~~~~ | regmap_write drivers/clk/mvebu/ap-cpu-clk.c: In function 'smc_regmap_read_poll_timeout': drivers/clk/mvebu/ap-cpu-clk.c:245:1: error: control reaches end of non-void function [-Werror=return-type] 245 | } | ^ cc1: some warnings being treated as errors vim +311 drivers/clk/mvebu/ap-cpu-clk.c 271 272 static int ap_cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate, 273 unsigned long parent_rate) 274 { 275 struct ap_cpu_clk *clk = to_ap_cpu_clk(hw); 276 int ret, reg, divider = parent_rate / rate; > 277 unsigned int cpu_clkdiv_reg, cpu_force_reg, cpu_ratio_reg, stable_bit; 278 279 cpu_clkdiv_reg = clk->pll_regs->divider_reg + 280 (clk->cluster * clk->pll_regs->cluster_offset); 281 cpu_force_reg = clk->pll_regs->force_reg + 282 (clk->cluster * clk->pll_regs->cluster_offset); 283 cpu_ratio_reg = clk->pll_regs->ratio_reg + 284 (clk->cluster * clk->pll_regs->cluster_offset); 285 286 clk->regmap_read(clk, cpu_clkdiv_reg, ®); 287 reg &= ~(clk->pll_regs->divider_mask); 288 reg |= (divider << clk->pll_regs->divider_offset); 289 290 /* 291 * AP807 CPU divider has two channels with ratio 1:3 and divider_ratio 292 * is 1. Otherwise, in the case of the AP806, divider_ratio is 0. 293 */ 294 if (clk->pll_regs->divider_ratio) { 295 reg &= ~(AP807_PLL_CR_1_CPU_CLK_DIV_RATIO_MASK); 296 reg |= ((divider * clk->pll_regs->divider_ratio) << 297 AP807_PLL_CR_1_CPU_CLK_DIV_RATIO_OFFSET); 298 } 299 clk->regmap_write(clk, cpu_clkdiv_reg, reg); 300 301 clk->regmap_update_bits(clk, cpu_force_reg, clk->pll_regs->force_mask, 302 clk->pll_regs->force_mask); 303 304 clk->regmap_update_bits(clk, cpu_ratio_reg, 305 BIT(clk->pll_regs->ratio_offset), 306 BIT(clk->pll_regs->ratio_offset)); 307 308 stable_bit = BIT(clk->pll_regs->ratio_state_offset + 309 clk->cluster * 310 clk->pll_regs->ratio_state_cluster_offset); > 311 ret = clk->regmap_read_poll_timeout(clk, 312 clk->pll_regs->ratio_state_reg, 313 stable_bit); 314 if (ret) 315 return ret; 316 317 clk->regmap_update_bits(clk, cpu_ratio_reg, 318 BIT(clk->pll_regs->ratio_offset), 0); 319 320 return 0; 321 } 322 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org